Store instruction ordering for multi-core processor

A method and apparatus for increasing performance of a multiplication operation in a processor. The processor's instruction set includes multiply instructions that can be used to accelerate modular exponentiation. Prior to issuing a sequence of multiply instructions for the multiplication opera...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	ASHER DAVID H.,KESSLER RICHARD E.,LEE YEN
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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