Flat panel display
A flat panel display device includes switching elements QA 3 and QA 4 , respectively connected to a voltage Vs and ground to be applied to a panel capacitance Cp when performing light emission relating to image display, for clamping the voltage of the panel capacitance; coils LA 1 and LA 2 each havi...
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creator | OHKI HIDEAKI,OTSUKA AKIRA,HAGIHARA SOJIRO,SHIIZAKI TAKASHI,ONOZAWA MAKOTO |
description | A flat panel display device includes switching elements QA 3 and QA 4 , respectively connected to a voltage Vs and ground to be applied to a panel capacitance Cp when performing light emission relating to image display, for clamping the voltage of the panel capacitance; coils LA 1 and LA 2 each having one end connected to the panel capacitance; a path separation circuit DLA 1 and DLA 2 , connected to the other ends of the coils, for separating paths through which charge/discharge currents flow; a switching element QA 1 connected between the voltage Vs and the path separation circuit; a switching element QA 2 connected between the ground and the path separation circuit; and diodes connected in parallel to the switching elements, in which the resonance reference voltage relating to a power recovery operation is set to a maximum voltage and a minimum voltage to be applied to the panel capacitance, and the paths through which the charge/discharge currents flow are separated to thereby improve the recovery efficiency in a power recovery circuit and enable realization of stable image display operation. |
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coils LA 1 and LA 2 each having one end connected to the panel capacitance; a path separation circuit DLA 1 and DLA 2 , connected to the other ends of the coils, for separating paths through which charge/discharge currents flow; a switching element QA 1 connected between the voltage Vs and the path separation circuit; a switching element QA 2 connected between the ground and the path separation circuit; and diodes connected in parallel to the switching elements, in which the resonance reference voltage relating to a power recovery operation is set to a maximum voltage and a minimum voltage to be applied to the panel capacitance, and the paths through which the charge/discharge currents flow are separated to thereby improve the recovery efficiency in a power recovery circuit and enable realization of stable image display operation.</description><language>eng</language><subject>ADVERTISING ; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION ; BASIC ELECTRIC ELEMENTS ; CRYPTOGRAPHY ; DISPLAY ; DISPLAYING ; EDUCATION ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS ; ELECTRIC HEATING ; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; LABELS OR NAME-PLATES ; PHYSICS ; PICTORIAL COMMUNICATION, e.g. TELEVISION ; SEALS ; SIGNS</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070829&DB=EPODOC&CC=CN&NR=101025883A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070829&DB=EPODOC&CC=CN&NR=101025883A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OHKI HIDEAKI,OTSUKA AKIRA,HAGIHARA SOJIRO,SHIIZAKI TAKASHI,ONOZAWA MAKOTO</creatorcontrib><title>Flat panel display</title><description>A flat panel display device includes switching elements QA 3 and QA 4 , respectively connected to a voltage Vs and ground to be applied to a panel capacitance Cp when performing light emission relating to image display, for clamping the voltage of the panel capacitance; coils LA 1 and LA 2 each having one end connected to the panel capacitance; a path separation circuit DLA 1 and DLA 2 , connected to the other ends of the coils, for separating paths through which charge/discharge currents flow; a switching element QA 1 connected between the voltage Vs and the path separation circuit; a switching element QA 2 connected between the ground and the path separation circuit; and diodes connected in parallel to the switching elements, in which the resonance reference voltage relating to a power recovery operation is set to a maximum voltage and a minimum voltage to be applied to the panel capacitance, and the paths through which the charge/discharge currents flow are separated to thereby improve the recovery efficiency in a power recovery circuit and enable realization of stable image display operation.</description><subject>ADVERTISING</subject><subject>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>DISPLAYING</subject><subject>EDUCATION</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS</subject><subject>ELECTRIC HEATING</subject><subject>ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>LABELS OR NAME-PLATES</subject><subject>PHYSICS</subject><subject>PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><subject>SEALS</subject><subject>SIGNS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBByy0ksUShIzEvNUUjJLC7ISazkYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GBoYGRqYWFsaOxsSoAQDieh--</recordid><startdate>20070829</startdate><enddate>20070829</enddate><creator>OHKI HIDEAKI,OTSUKA AKIRA,HAGIHARA SOJIRO,SHIIZAKI TAKASHI,ONOZAWA MAKOTO</creator><scope>EVB</scope></search><sort><creationdate>20070829</creationdate><title>Flat panel display</title><author>OHKI HIDEAKI,OTSUKA AKIRA,HAGIHARA SOJIRO,SHIIZAKI TAKASHI,ONOZAWA MAKOTO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN101025883A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>ADVERTISING</topic><topic>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>DISPLAYING</topic><topic>EDUCATION</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS</topic><topic>ELECTRIC HEATING</topic><topic>ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>LABELS OR NAME-PLATES</topic><topic>PHYSICS</topic><topic>PICTORIAL COMMUNICATION, e.g. TELEVISION</topic><topic>SEALS</topic><topic>SIGNS</topic><toplevel>online_resources</toplevel><creatorcontrib>OHKI HIDEAKI,OTSUKA AKIRA,HAGIHARA SOJIRO,SHIIZAKI TAKASHI,ONOZAWA MAKOTO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OHKI HIDEAKI,OTSUKA AKIRA,HAGIHARA SOJIRO,SHIIZAKI TAKASHI,ONOZAWA MAKOTO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Flat panel display</title><date>2007-08-29</date><risdate>2007</risdate><abstract>A flat panel display device includes switching elements QA 3 and QA 4 , respectively connected to a voltage Vs and ground to be applied to a panel capacitance Cp when performing light emission relating to image display, for clamping the voltage of the panel capacitance; coils LA 1 and LA 2 each having one end connected to the panel capacitance; a path separation circuit DLA 1 and DLA 2 , connected to the other ends of the coils, for separating paths through which charge/discharge currents flow; a switching element QA 1 connected between the voltage Vs and the path separation circuit; a switching element QA 2 connected between the ground and the path separation circuit; and diodes connected in parallel to the switching elements, in which the resonance reference voltage relating to a power recovery operation is set to a maximum voltage and a minimum voltage to be applied to the panel capacitance, and the paths through which the charge/discharge currents flow are separated to thereby improve the recovery efficiency in a power recovery circuit and enable realization of stable image display operation.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION BASIC ELECTRIC ELEMENTS CRYPTOGRAPHY DISPLAY DISPLAYING EDUCATION ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS ELECTRIC HEATING ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY LABELS OR NAME-PLATES PHYSICS PICTORIAL COMMUNICATION, e.g. TELEVISION SEALS SIGNS |
title | Flat panel display |
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