Einrichtung zum Auffinden des Speicherplatzes für die einen Gegenstand betreffenden Daten im Speicher einer Datenverarbeitungsanlage

1,003,924. Digital computers. SPERRY RAND CORPORATION. July 30, 1962 [Aug. 17, 1961], No. 29150/62. Heading G4A. An indirect addressing system includes a keyword register, the successive keyword digits being effective to select a particular address from a register storing a plurality of addresses, or to terminate the selection process. Each keyword digit corresponds to one level of indirect addressing in a multi-level indirect addressing system. The indirect addressing system described can be applied to the data processing system described in Specifications 1,003,921 and 1,003,923. Word format.-Computer words consist of twelve decimal digits, each digit being represented in binary-coded form, a fifth, checking bit, being appended. An instruction word takes the form T II AA BB M1M1M1M1M1 where T which normally indicates whether the machine is to go into a tracing mode, can have a special value to indicate that an indirect addressing operation is required. The II digits are an operation code and the AA and BB digits designate addressable registers among the 100 such registers 121, Fig. 1a these registers providing certain operands or being used in address modification. The five M1 digits denote an address in the memory 111. The first " keyword " takes the form KKKKK BB MMMMM there being five " key digits K," the BB digits denoting an addressable register 121, whose contents may be employed to modify the M digits which are the address of the first " M word " of memory words containing two addresses, the M words constituting the indirect addressing series. Subsequent keywords contain twelve key digits. Each key digit K equals 0, 1, 4, 5, 6 or 9. If K=5, 6 or 9, modification of the M word address by the contents of the designated addressable register 121 is called for. If K = 0 or 5 it indicates that the left-hand portion of an M word is required; if K = 1 or 6, the right-hand portion is indicated; and if K = 4 or 9, the indirect addressing is terminated, the word addressed by the current address being the required operand. The M words take the form MMMMM BB MMMMM, representing two memory addresses (only one of which is selected) and an addressable register address BB. Operation.-In an indirect addressing operation, the address in the control counter 104 causes the first instruction T II AA BB M1M1M1M1M1 to be read out from the core memory 111 into the instruction register 101, the T symbol indicating an indirect addressing operation setting an indirect address