HIGH TEMPERATURE, HIGH VOLTAGE SIC VOID-LESS ELECTRONIC PACKAGE
An electronic package designed to package silicon carbide discrete components for silicon carbide chips. The electronic package allows thousands of power cycles and/or temperature cycles between -550°C to 3000°C. The present invention can also tolerate continuous operation at 3000°C, due to high the...
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creator | AUTRY, TRACY KELLY, STEPHEN G |
description | An electronic package designed to package silicon carbide discrete components for silicon carbide chips. The electronic package allows thousands of power cycles and/or temperature cycles between -550°C to 3000°C. The present invention can also tolerate continuous operation at 3000°C, due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. By eliminating the wire bonds, the electronic package is able to withstand an injection mold. |
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The electronic package allows thousands of power cycles and/or temperature cycles between -550°C to 3000°C. The present invention can also tolerate continuous operation at 3000°C, due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. By eliminating the wire bonds, the electronic package is able to withstand an injection mold.</description><language>eng ; fre</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110215&DB=EPODOC&CC=CA&NR=2666081C$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110215&DB=EPODOC&CC=CA&NR=2666081C$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>AUTRY, TRACY</creatorcontrib><creatorcontrib>KELLY, STEPHEN G</creatorcontrib><title>HIGH TEMPERATURE, HIGH VOLTAGE SIC VOID-LESS ELECTRONIC PACKAGE</title><description>An electronic package designed to package silicon carbide discrete components for silicon carbide chips. The electronic package allows thousands of power cycles and/or temperature cycles between -550°C to 3000°C. The present invention can also tolerate continuous operation at 3000°C, due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. 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The electronic package allows thousands of power cycles and/or temperature cycles between -550°C to 3000°C. The present invention can also tolerate continuous operation at 3000°C, due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. By eliminating the wire bonds, the electronic package is able to withstand an injection mold.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng ; fre |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | HIGH TEMPERATURE, HIGH VOLTAGE SIC VOID-LESS ELECTRONIC PACKAGE |
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