SURGE COUNTER/DETECTOR APPARATUS, SYSTEM AND METHOD
A surge counter/detector apparatus includes current sensors communicating with power lines to sense a surge condition. A trigger circuit communicates with the current sensors and outputs a first signal in response to the sensed surge condition. The trigger circuit is reset and enabled by a second si...
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creator | FUNKE, JAMES KLADAR, DALIBOR DABROWSKI, HENRYK JAN BANDURA, MIECZYSLAW HA, CHI THUONG MENDOZA, ANTHONY-CERNAN |
description | A surge counter/detector apparatus includes current sensors communicating with power lines to sense a surge condition. A trigger circuit communicates with the current sensors and outputs a first signal in response to the sensed surge condition. The trigger circuit is reset and enabled by a second signal in order to enable subsequent output of the first signal. A processor detects the first signal from the trigger circuit and responsively increments and displays a count value at a display. The processor provides the second signal having a first state to reset the trigger circuit and a second state to enable the trigger circuit. The processor includes a timer to vary a time between (a) detecting the first signal, and (b) resetting and enabling the trigger circuit. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CA2447200C</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CA2447200C</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CA2447200C3</originalsourceid><addsrcrecordid>eNrjZDAODg1yd1Vw9g_1C3EN0ndxDXF1DvEPUnAMCHAMcgwJDdZRCI4MDnH1VXD0c1HwdQ3x8HfhYWBNS8wpTuWF0twM8m6uIc4euqkF-fGpxQWJyal5qSXxzo5GJibmRgYGzsaEVQAAHCsmSw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SURGE COUNTER/DETECTOR APPARATUS, SYSTEM AND METHOD</title><source>esp@cenet</source><creator>FUNKE, JAMES ; KLADAR, DALIBOR ; DABROWSKI, HENRYK JAN ; BANDURA, MIECZYSLAW ; HA, CHI THUONG ; MENDOZA, ANTHONY-CERNAN</creator><creatorcontrib>FUNKE, JAMES ; KLADAR, DALIBOR ; DABROWSKI, HENRYK JAN ; BANDURA, MIECZYSLAW ; HA, CHI THUONG ; MENDOZA, ANTHONY-CERNAN</creatorcontrib><description>A surge counter/detector apparatus includes current sensors communicating with power lines to sense a surge condition. A trigger circuit communicates with the current sensors and outputs a first signal in response to the sensed surge condition. The trigger circuit is reset and enabled by a second signal in order to enable subsequent output of the first signal. A processor detects the first signal from the trigger circuit and responsively increments and displays a count value at a display. The processor provides the second signal having a first state to reset the trigger circuit and a second state to enable the trigger circuit. The processor includes a timer to vary a time between (a) detecting the first signal, and (b) resetting and enabling the trigger circuit.</description><language>eng ; fre</language><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS ; GENERATION ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120103&DB=EPODOC&CC=CA&NR=2447200C$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76292</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120103&DB=EPODOC&CC=CA&NR=2447200C$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FUNKE, JAMES</creatorcontrib><creatorcontrib>KLADAR, DALIBOR</creatorcontrib><creatorcontrib>DABROWSKI, HENRYK JAN</creatorcontrib><creatorcontrib>BANDURA, MIECZYSLAW</creatorcontrib><creatorcontrib>HA, CHI THUONG</creatorcontrib><creatorcontrib>MENDOZA, ANTHONY-CERNAN</creatorcontrib><title>SURGE COUNTER/DETECTOR APPARATUS, SYSTEM AND METHOD</title><description>A surge counter/detector apparatus includes current sensors communicating with power lines to sense a surge condition. A trigger circuit communicates with the current sensors and outputs a first signal in response to the sensed surge condition. The trigger circuit is reset and enabled by a second signal in order to enable subsequent output of the first signal. A processor detects the first signal from the trigger circuit and responsively increments and displays a count value at a display. The processor provides the second signal having a first state to reset the trigger circuit and a second state to enable the trigger circuit. The processor includes a timer to vary a time between (a) detecting the first signal, and (b) resetting and enabling the trigger circuit.</description><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS</subject><subject>GENERATION</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAODg1yd1Vw9g_1C3EN0ndxDXF1DvEPUnAMCHAMcgwJDdZRCI4MDnH1VXD0c1HwdQ3x8HfhYWBNS8wpTuWF0twM8m6uIc4euqkF-fGpxQWJyal5qSXxzo5GJibmRgYGzsaEVQAAHCsmSw</recordid><startdate>20120103</startdate><enddate>20120103</enddate><creator>FUNKE, JAMES</creator><creator>KLADAR, DALIBOR</creator><creator>DABROWSKI, HENRYK JAN</creator><creator>BANDURA, MIECZYSLAW</creator><creator>HA, CHI THUONG</creator><creator>MENDOZA, ANTHONY-CERNAN</creator><scope>EVB</scope></search><sort><creationdate>20120103</creationdate><title>SURGE COUNTER/DETECTOR APPARATUS, SYSTEM AND METHOD</title><author>FUNKE, JAMES ; KLADAR, DALIBOR ; DABROWSKI, HENRYK JAN ; BANDURA, MIECZYSLAW ; HA, CHI THUONG ; MENDOZA, ANTHONY-CERNAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CA2447200C3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre</language><creationdate>2012</creationdate><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS</topic><topic>GENERATION</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>FUNKE, JAMES</creatorcontrib><creatorcontrib>KLADAR, DALIBOR</creatorcontrib><creatorcontrib>DABROWSKI, HENRYK JAN</creatorcontrib><creatorcontrib>BANDURA, MIECZYSLAW</creatorcontrib><creatorcontrib>HA, CHI THUONG</creatorcontrib><creatorcontrib>MENDOZA, ANTHONY-CERNAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FUNKE, JAMES</au><au>KLADAR, DALIBOR</au><au>DABROWSKI, HENRYK JAN</au><au>BANDURA, MIECZYSLAW</au><au>HA, CHI THUONG</au><au>MENDOZA, ANTHONY-CERNAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SURGE COUNTER/DETECTOR APPARATUS, SYSTEM AND METHOD</title><date>2012-01-03</date><risdate>2012</risdate><abstract>A surge counter/detector apparatus includes current sensors communicating with power lines to sense a surge condition. A trigger circuit communicates with the current sensors and outputs a first signal in response to the sensed surge condition. The trigger circuit is reset and enabled by a second signal in order to enable subsequent output of the first signal. A processor detects the first signal from the trigger circuit and responsively increments and displays a count value at a display. The processor provides the second signal having a first state to reset the trigger circuit and a second state to enable the trigger circuit. The processor includes a timer to vary a time between (a) detecting the first signal, and (b) resetting and enabling the trigger circuit.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS GENERATION MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING |
title | SURGE COUNTER/DETECTOR APPARATUS, SYSTEM AND METHOD |
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