ARRANGEMENT AND METHOD RELATING TO DIGITAL INFORMATION

ARRANGEMENT AND METHOD RELATING TO DIGITAL INFORMATION

The present invention relates to a logic circuit arrangement comprising sign al input means and signal output means (1, 2) (respectively) and a number of SF Q circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. SFQ circuits comprising Josephson ju...

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Hauptverfasser: KAPLUNENKO, VSEVOLOD, WIKBORG, ERLAND
Format: Patent
Sprache:eng ; fre
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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creator KAPLUNENKO, VSEVOLOD
WIKBORG, ERLAND
description The present invention relates to a logic circuit arrangement comprising sign al input means and signal output means (1, 2) (respectively) and a number of SF Q circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. SFQ circuits comprising Josephson junctions ar e sampled at the input/output for producing DC voltages and a train comprising at least two single flux quanta is used as carrier means for information and phase locking between at least two Josephson junctions is used to provide at least two different dynamic states of which at least one provides an output signal. The present invention relates to a logic circuit arrangement comprising signal input means and signal output means (1, 2) (respectively) and a number of SFQ circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. SFQ circuits comprising Josephson junctions are sampled at the input/output for producing DC voltages and a train comprising at least two single flux quanta is used as carrier means for information and phase locking between at least two Josephson junctions is used to provide at least two different dynamic states of which at least one provides an output signal.
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SFQ circuits comprising Josephson junctions ar e sampled at the input/output for producing DC voltages and a train comprising at least two single flux quanta is used as carrier means for information and phase locking between at least two Josephson junctions is used to provide at least two different dynamic states of which at least one provides an output signal. The present invention relates to a logic circuit arrangement comprising signal input means and signal output means (1, 2) (respectively) and a number of SFQ circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. SFQ circuits comprising Josephson junctions are sampled at the input/output for producing DC voltages and a train comprising at least two single flux quanta is used as carrier means for information and phase locking between at least two Josephson junctions is used to provide at least two different dynamic states of which at least one provides an output signal.</description><edition>6</edition><language>eng ; fre</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>1997</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19970123&amp;DB=EPODOC&amp;CC=CA&amp;NR=2225803A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19970123&amp;DB=EPODOC&amp;CC=CA&amp;NR=2225803A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KAPLUNENKO, VSEVOLOD</creatorcontrib><creatorcontrib>WIKBORG, ERLAND</creatorcontrib><title>ARRANGEMENT AND METHOD RELATING TO DIGITAL INFORMATION</title><description>The present invention relates to a logic circuit arrangement comprising sign al input means and signal output means (1, 2) (respectively) and a number of SF Q circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. SFQ circuits comprising Josephson junctions ar e sampled at the input/output for producing DC voltages and a train comprising at least two single flux quanta is used as carrier means for information and phase locking between at least two Josephson junctions is used to provide at least two different dynamic states of which at least one provides an output signal. The present invention relates to a logic circuit arrangement comprising signal input means and signal output means (1, 2) (respectively) and a number of SFQ circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. 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subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
title ARRANGEMENT AND METHOD RELATING TO DIGITAL INFORMATION
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