INTRODUCING PROCESSING DELAY AS A MULTIPLE OF THE TIME SLOT DURATION

An apparatus for performance improvement of a burst mode digital wireless receiver comprises a processing circuit for processing a plurality of received signals and providing a processed signal and a delay circuit for introducing a predetermined delay to the processed signal. The delay circuit is co...

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Bibliographische Detailangaben

Hauptverfasser:	MARTIN, CAROL CATALANO, WINTERS, JACK HARRIMAN, GOLDEN, GLENN DAVID
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY MULTIPLEX COMMUNICATION TRANSMISSION TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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