MULTIPLIER
A multiplier for multiplying two binary operands comprising an encoding unit, a multiplying unit composed of two multiplying arrays and a logic unit. The encoding unit to which a second operand is supplied generates factors following the Booth algorithm. The two multiplying arrays are respectively s...
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| creator | GETZLAFF, KLAUS J DAO-TRONG, SON HELWIG, KLAUS |
| description | A multiplier for multiplying two binary operands comprising an encoding unit, a multiplying unit composed of two multiplying arrays and a logic unit. The encoding unit to which a second operand is supplied generates factors following the Booth algorithm. The two multiplying arrays are respectively supplied with a first operand and factors belonging to the higher significance digits, respectively, of the second operand. Both multiplying arrays simultaneously multiply the factors with the first operand into respective partial end products. Both partial end products are applied to the logic unit which generates therefrom the end product in accordance with the algorithm used at the beginning. |
| format | Patent |
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The encoding unit to which a second operand is supplied generates factors following the Booth algorithm. The two multiplying arrays are respectively supplied with a first operand and factors belonging to the higher significance digits, respectively, of the second operand. Both multiplying arrays simultaneously multiply the factors with the first operand into respective partial end products. Both partial end products are applied to the logic unit which generates therefrom the end product in accordance with the algorithm used at the beginning.</description><edition>5</edition><language>eng ; fre</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1994</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19941025&DB=EPODOC&CC=CA&NR=2006228C$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19941025&DB=EPODOC&CC=CA&NR=2006228C$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GETZLAFF, KLAUS J</creatorcontrib><creatorcontrib>DAO-TRONG, SON</creatorcontrib><creatorcontrib>HELWIG, KLAUS</creatorcontrib><title>MULTIPLIER</title><description>A multiplier for multiplying two binary operands comprising an encoding unit, a multiplying unit composed of two multiplying arrays and a logic unit. The encoding unit to which a second operand is supplied generates factors following the Booth algorithm. The two multiplying arrays are respectively supplied with a first operand and factors belonging to the higher significance digits, respectively, of the second operand. Both multiplying arrays simultaneously multiply the factors with the first operand into respective partial end products. Both partial end products are applied to the logic unit which generates therefrom the end product in accordance with the algorithm used at the beginning.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1994</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZODyDfUJ8Qzw8XQN4mFgTUvMKU7lhdLcDPJuriHOHrqpBfnxqcUFicmpeakl8c6ORgYGZkZGFs7GhFUAAPmoGwY</recordid><startdate>19941025</startdate><enddate>19941025</enddate><creator>GETZLAFF, KLAUS J</creator><creator>DAO-TRONG, SON</creator><creator>HELWIG, KLAUS</creator><scope>EVB</scope></search><sort><creationdate>19941025</creationdate><title>MULTIPLIER</title><author>GETZLAFF, KLAUS J ; DAO-TRONG, SON ; HELWIG, KLAUS</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CA2006228C3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre</language><creationdate>1994</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>GETZLAFF, KLAUS J</creatorcontrib><creatorcontrib>DAO-TRONG, SON</creatorcontrib><creatorcontrib>HELWIG, KLAUS</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GETZLAFF, KLAUS J</au><au>DAO-TRONG, SON</au><au>HELWIG, KLAUS</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MULTIPLIER</title><date>1994-10-25</date><risdate>1994</risdate><abstract>A multiplier for multiplying two binary operands comprising an encoding unit, a multiplying unit composed of two multiplying arrays and a logic unit. The encoding unit to which a second operand is supplied generates factors following the Booth algorithm. The two multiplying arrays are respectively supplied with a first operand and factors belonging to the higher significance digits, respectively, of the second operand. Both multiplying arrays simultaneously multiply the factors with the first operand into respective partial end products. Both partial end products are applied to the logic unit which generates therefrom the end product in accordance with the algorithm used at the beginning.</abstract><edition>5</edition><oa>free_for_read</oa></addata></record> |
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| language | eng ; fre |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | MULTIPLIER |
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