MULTI-PROCESSOR SYSTEM HAVING A MULTI-PORT CACHE MEMORY
A multi-port cache memory of multi-port memory structure is connected to and shared with a plurality of processors. The multi-port cache memory may have two sets of interface signal lines, for instruction fetch and for data read/write, to each processor. The multi-port cache memory may also be used...
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| Format: | Patent |
| Sprache: | eng ; fre |
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| Zusammenfassung: | A multi-port cache memory of multi-port memory structure is connected to and shared with a plurality of processors. The multi-port cache memory may have two sets of interface signal lines, for instruction fetch and for data read/write, to each processor. The multi-port cache memory may also be used only for data read/write. The system performance is further improved if a plurality of processors and a multi-port cache memory are fabricated on a single LSI chip. |
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