FREQUENCY MODULATION IN PHASE-LOCKED LOOPS

A phase-locked loop (PLL) frequency synthesizer having an analog, out-of-band component path and a digital, in-band component path to provide frequency modulation (FM) of the synthesized output signal is described. The in-band FM component is octave scaled by an analog scaling means and coupled to an analog-to-digital converter to provide a digital number to be decade added to the PLL divide number to change the PLL frequency in response to the in-band FM signal. The out-of-band FM component is also scaled and applied to a loop summing node and summed with the PLL error signal to vary the PLL frequency. The scaling in both the inband component path and out-of-band component path is equalized to provide a flat frequency response. Additional, the in-band component is scaled to allow use of the analog-to-digital converter over its maximum range to maintain a high signal-to-noise ratio.