C-MOS ARITHMETIC - LOGIC UNIT

An arithmetic logic unit has elementary cells performing logical addition, one for each pair of operand bits, which are optimized for carry propagation speed and are controlled by auxiliary logic allowing them to perform additional operations; the unit further comprises a control signal generating c...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LICCIARDI, LUIGI, TORIELLI, ALESSANDRO
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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