ACCELERATED INSTRUCTION MAPPING EXTERNAL TO SOURCE AND TARGET INSTRUCTION STREAMS FOR NEAR REALTIME INJECTION INTO THE LATTER

ACCELERATED INSTRUCTION MAPPING EXTERNAL TO SOURCE AND TARGET INSTRUCTION STREAMS FOR NEAR REALTIME INJECTION INTO THE LATTER

If a predetermined field within a source instruction indexes and accesses a body of control information from memory, and if control information designates the field-to-field (register-to-register) mapping, then a skeleton target instruction can be filled in by either selectively copying the fieldsof...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: GRIFFITH, ROBERT L, RADIN, GEORGE, HOMAN, MERLE E, FISK, DALE E, RICHARDS, WALDO J
Format: Patent
Sprache:eng ; fre
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator GRIFFITH, ROBERT L
RADIN, GEORGE
HOMAN, MERLE E
FISK, DALE E
RICHARDS, WALDO J
description If a predetermined field within a source instruction indexes and accesses a body of control information from memory, and if control information designates the field-to-field (register-to-register) mapping, then a skeleton target instruction can be filled in by either selectively copying the fieldsof the source instruction or otherwise computing same. If the mapping is executed by an interposed independent processor then overlapping of such conversion enhances throughput, the independent processor converting multifield instructions for a CPU of a first kind to multifield instructions for a CPU of a second kind without disrupting the logical flow or execution of either source or target instruction streams.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CA1199414A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CA1199414A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CA1199414A3</originalsourceid><addsrcrecordid>eNqFjLEKwkAQRNNYiPoN7g9YBNOkXC6b5ORuL2w2YBeCnJVoILb-uwfaWFnNDLx56-yFxpAjQaUKLPcqg1EbGDx2neUG6KwkjA40QB8GMQTIFShKQ_rzSI3Q91AHASYUSNOp9ZSoE30Yy0mjLYFDTd5ttrpOtyXuvrnJ9jWpaQ9xfoxxmadLvMfnaDDPy7LICzz-J94VYzrX</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ACCELERATED INSTRUCTION MAPPING EXTERNAL TO SOURCE AND TARGET INSTRUCTION STREAMS FOR NEAR REALTIME INJECTION INTO THE LATTER</title><source>esp@cenet</source><creator>GRIFFITH, ROBERT L ; RADIN, GEORGE ; HOMAN, MERLE E ; FISK, DALE E ; RICHARDS, WALDO J</creator><creatorcontrib>GRIFFITH, ROBERT L ; RADIN, GEORGE ; HOMAN, MERLE E ; FISK, DALE E ; RICHARDS, WALDO J</creatorcontrib><description>If a predetermined field within a source instruction indexes and accesses a body of control information from memory, and if control information designates the field-to-field (register-to-register) mapping, then a skeleton target instruction can be filled in by either selectively copying the fieldsof the source instruction or otherwise computing same. If the mapping is executed by an interposed independent processor then overlapping of such conversion enhances throughput, the independent processor converting multifield instructions for a CPU of a first kind to multifield instructions for a CPU of a second kind without disrupting the logical flow or execution of either source or target instruction streams.</description><edition>4</edition><language>eng ; fre</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1986</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19860114&amp;DB=EPODOC&amp;CC=CA&amp;NR=1199414A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76419</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19860114&amp;DB=EPODOC&amp;CC=CA&amp;NR=1199414A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GRIFFITH, ROBERT L</creatorcontrib><creatorcontrib>RADIN, GEORGE</creatorcontrib><creatorcontrib>HOMAN, MERLE E</creatorcontrib><creatorcontrib>FISK, DALE E</creatorcontrib><creatorcontrib>RICHARDS, WALDO J</creatorcontrib><title>ACCELERATED INSTRUCTION MAPPING EXTERNAL TO SOURCE AND TARGET INSTRUCTION STREAMS FOR NEAR REALTIME INJECTION INTO THE LATTER</title><description>If a predetermined field within a source instruction indexes and accesses a body of control information from memory, and if control information designates the field-to-field (register-to-register) mapping, then a skeleton target instruction can be filled in by either selectively copying the fieldsof the source instruction or otherwise computing same. If the mapping is executed by an interposed independent processor then overlapping of such conversion enhances throughput, the independent processor converting multifield instructions for a CPU of a first kind to multifield instructions for a CPU of a second kind without disrupting the logical flow or execution of either source or target instruction streams.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1986</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqFjLEKwkAQRNNYiPoN7g9YBNOkXC6b5ORuL2w2YBeCnJVoILb-uwfaWFnNDLx56-yFxpAjQaUKLPcqg1EbGDx2neUG6KwkjA40QB8GMQTIFShKQ_rzSI3Q91AHASYUSNOp9ZSoE30Yy0mjLYFDTd5ttrpOtyXuvrnJ9jWpaQ9xfoxxmadLvMfnaDDPy7LICzz-J94VYzrX</recordid><startdate>19860114</startdate><enddate>19860114</enddate><creator>GRIFFITH, ROBERT L</creator><creator>RADIN, GEORGE</creator><creator>HOMAN, MERLE E</creator><creator>FISK, DALE E</creator><creator>RICHARDS, WALDO J</creator><scope>EVB</scope></search><sort><creationdate>19860114</creationdate><title>ACCELERATED INSTRUCTION MAPPING EXTERNAL TO SOURCE AND TARGET INSTRUCTION STREAMS FOR NEAR REALTIME INJECTION INTO THE LATTER</title><author>GRIFFITH, ROBERT L ; RADIN, GEORGE ; HOMAN, MERLE E ; FISK, DALE E ; RICHARDS, WALDO J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CA1199414A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre</language><creationdate>1986</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>GRIFFITH, ROBERT L</creatorcontrib><creatorcontrib>RADIN, GEORGE</creatorcontrib><creatorcontrib>HOMAN, MERLE E</creatorcontrib><creatorcontrib>FISK, DALE E</creatorcontrib><creatorcontrib>RICHARDS, WALDO J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GRIFFITH, ROBERT L</au><au>RADIN, GEORGE</au><au>HOMAN, MERLE E</au><au>FISK, DALE E</au><au>RICHARDS, WALDO J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ACCELERATED INSTRUCTION MAPPING EXTERNAL TO SOURCE AND TARGET INSTRUCTION STREAMS FOR NEAR REALTIME INJECTION INTO THE LATTER</title><date>1986-01-14</date><risdate>1986</risdate><abstract>If a predetermined field within a source instruction indexes and accesses a body of control information from memory, and if control information designates the field-to-field (register-to-register) mapping, then a skeleton target instruction can be filled in by either selectively copying the fieldsof the source instruction or otherwise computing same. If the mapping is executed by an interposed independent processor then overlapping of such conversion enhances throughput, the independent processor converting multifield instructions for a CPU of a first kind to multifield instructions for a CPU of a second kind without disrupting the logical flow or execution of either source or target instruction streams.</abstract><edition>4</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre
recordid cdi_epo_espacenet_CA1199414A
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title ACCELERATED INSTRUCTION MAPPING EXTERNAL TO SOURCE AND TARGET INSTRUCTION STREAMS FOR NEAR REALTIME INJECTION INTO THE LATTER
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T20%3A29%3A13IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GRIFFITH,%20ROBERT%20L&rft.date=1986-01-14&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECA1199414A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true