PERIPHERAL PROCESSOR ARCHITECTURE

CT9-80-006 An improved peripheral processor architecture wherein the function controlling information of a program is separated from portions of the sequence of execution controlling information and each are stored in the form of tables. The function controlling information takes the form of a table...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MACAULEY, GEORGE C, ROEFER, ROBERT W, STRICKLAND, ALAN B, HENDRICKSON, THOMAS A, PIERCE, DONALD L
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!