Système de conversion
987, 289. Electric selective signalling. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 9, 1962 [June 6, 1961], No. 17829/62. Heading G4H. In an analogue-to-digital converter the digitized value is converted to an alternating current and subsequently reconverted to D.C. which is fed to a comparato...
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creator | HOWARD L. FUNK THOMAS J. HARRISON JAMES JURSIK |
description | 987, 289. Electric selective signalling. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 9, 1962 [June 6, 1961], No. 17829/62. Heading G4H. In an analogue-to-digital converter the digitized value is converted to an alternating current and subsequently reconverted to D.C. which is fed to a comparator together with the input analogue signal. The converter is controlled by a sequence of timing pulses. When an analogue signal is to be digitized binary digital register 50 is set to digit 8. This digital value is converted to the analogue value and used to charge capacitor 22. The capacitor is next connected to the unknown analogue signal and, if this differs from the value stored, a current flows which has a direction dependent upon the sign of the difference voltage. Unit 40 increases the signal/noise ratio and gives a signal on positive or negative leads to unit 46. If the unknown signal is less than digit 8 unit 46 gives a resetting signal which removes digit 8 from the register; if the unknown is greater than 8 the digit 8 is not removed. The next timing pulse switches in digit 4, and the comparison cycle repeats. When two decades have been determined in binary form a signal is emitted on line 122. Part of the circuiting is double shielded as indicated in broken line so that the unknown analogue input is isolated from the converter. The comparison voltage is therefore converted to A.C. by unit 62 and coupled to the comparison section by transformer 66. A range selector 24 is provided prior to the capacitor 22. The difference current pulse is extracted by way of transformer 14. If the difference voltage is large, e.g. at the beginning of the conversion, signals may appear on both leads 42 and 44 due to overshoot in amplifier 38. Unit 46 will detect which of the leads was marked first and provide the appropriate output. Unit 46 may also provide an indication of the sign of the analogue input, it controlling the phase of the demodulator 72 appropriately. As no digit greater than 9 can be registered, if the first comparison indicates a digit 8 then digits 4 and 2 can be blocked. |
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In an analogue-to-digital converter the digitized value is converted to an alternating current and subsequently reconverted to D.C. which is fed to a comparator together with the input analogue signal. The converter is controlled by a sequence of timing pulses. When an analogue signal is to be digitized binary digital register 50 is set to digit 8. This digital value is converted to the analogue value and used to charge capacitor 22. The capacitor is next connected to the unknown analogue signal and, if this differs from the value stored, a current flows which has a direction dependent upon the sign of the difference voltage. Unit 40 increases the signal/noise ratio and gives a signal on positive or negative leads to unit 46. If the unknown signal is less than digit 8 unit 46 gives a resetting signal which removes digit 8 from the register; if the unknown is greater than 8 the digit 8 is not removed. The next timing pulse switches in digit 4, and the comparison cycle repeats. When two decades have been determined in binary form a signal is emitted on line 122. Part of the circuiting is double shielded as indicated in broken line so that the unknown analogue input is isolated from the converter. The comparison voltage is therefore converted to A.C. by unit 62 and coupled to the comparison section by transformer 66. A range selector 24 is provided prior to the capacitor 22. The difference current pulse is extracted by way of transformer 14. If the difference voltage is large, e.g. at the beginning of the conversion, signals may appear on both leads 42 and 44 due to overshoot in amplifier 38. Unit 46 will detect which of the leads was marked first and provide the appropriate output. Unit 46 may also provide an indication of the sign of the analogue input, it controlling the phase of the demodulator 72 appropriately. As no digit greater than 9 can be registered, if the first comparison indicates a digit 8 then digits 4 and 2 can be blocked.</description><edition>1</edition><language>fre</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY</subject><creationdate>1962</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19620917&DB=EPODOC&CC=BE&NR=618269A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19620917&DB=EPODOC&CC=BE&NR=618269A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HOWARD L. FUNK</creatorcontrib><creatorcontrib>THOMAS J. HARRISON</creatorcontrib><creatorcontrib>JAMES JURSIK</creatorcontrib><title>Système de conversion</title><description>987, 289. Electric selective signalling. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 9, 1962 [June 6, 1961], No. 17829/62. Heading G4H. In an analogue-to-digital converter the digitized value is converted to an alternating current and subsequently reconverted to D.C. which is fed to a comparator together with the input analogue signal. The converter is controlled by a sequence of timing pulses. When an analogue signal is to be digitized binary digital register 50 is set to digit 8. This digital value is converted to the analogue value and used to charge capacitor 22. The capacitor is next connected to the unknown analogue signal and, if this differs from the value stored, a current flows which has a direction dependent upon the sign of the difference voltage. Unit 40 increases the signal/noise ratio and gives a signal on positive or negative leads to unit 46. If the unknown signal is less than digit 8 unit 46 gives a resetting signal which removes digit 8 from the register; if the unknown is greater than 8 the digit 8 is not removed. The next timing pulse switches in digit 4, and the comparison cycle repeats. When two decades have been determined in binary form a signal is emitted on line 122. Part of the circuiting is double shielded as indicated in broken line so that the unknown analogue input is isolated from the converter. The comparison voltage is therefore converted to A.C. by unit 62 and coupled to the comparison section by transformer 66. A range selector 24 is provided prior to the capacitor 22. The difference current pulse is extracted by way of transformer 14. If the difference voltage is large, e.g. at the beginning of the conversion, signals may appear on both leads 42 and 44 due to overshoot in amplifier 38. Unit 46 will detect which of the leads was marked first and provide the appropriate output. Unit 46 may also provide an indication of the sign of the analogue input, it controlling the phase of the demodulator 72 appropriately. As no digit greater than 9 can be registered, if the first comparison indicates a digit 8 then digits 4 and 2 can be blocked.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1962</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBALriwuObwiN1UhJVUhOT-vLLWoODM_j4eBNS0xpziVF0pzM8i5uYY4e-imFuTHpxYXJCan5qWWxDu5mhlaGJlZOhoTVAAAKUYhAg</recordid><startdate>19620917</startdate><enddate>19620917</enddate><creator>HOWARD L. FUNK</creator><creator>THOMAS J. HARRISON</creator><creator>JAMES JURSIK</creator><scope>EVB</scope></search><sort><creationdate>19620917</creationdate><title>Système de conversion</title><author>HOWARD L. FUNK ; THOMAS J. HARRISON ; JAMES JURSIK</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_BE618269A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>fre</language><creationdate>1962</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>HOWARD L. FUNK</creatorcontrib><creatorcontrib>THOMAS J. HARRISON</creatorcontrib><creatorcontrib>JAMES JURSIK</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HOWARD L. FUNK</au><au>THOMAS J. HARRISON</au><au>JAMES JURSIK</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Système de conversion</title><date>1962-09-17</date><risdate>1962</risdate><abstract>987, 289. Electric selective signalling. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 9, 1962 [June 6, 1961], No. 17829/62. Heading G4H. In an analogue-to-digital converter the digitized value is converted to an alternating current and subsequently reconverted to D.C. which is fed to a comparator together with the input analogue signal. The converter is controlled by a sequence of timing pulses. When an analogue signal is to be digitized binary digital register 50 is set to digit 8. This digital value is converted to the analogue value and used to charge capacitor 22. The capacitor is next connected to the unknown analogue signal and, if this differs from the value stored, a current flows which has a direction dependent upon the sign of the difference voltage. Unit 40 increases the signal/noise ratio and gives a signal on positive or negative leads to unit 46. If the unknown signal is less than digit 8 unit 46 gives a resetting signal which removes digit 8 from the register; if the unknown is greater than 8 the digit 8 is not removed. The next timing pulse switches in digit 4, and the comparison cycle repeats. When two decades have been determined in binary form a signal is emitted on line 122. Part of the circuiting is double shielded as indicated in broken line so that the unknown analogue input is isolated from the converter. The comparison voltage is therefore converted to A.C. by unit 62 and coupled to the comparison section by transformer 66. A range selector 24 is provided prior to the capacitor 22. The difference current pulse is extracted by way of transformer 14. If the difference voltage is large, e.g. at the beginning of the conversion, signals may appear on both leads 42 and 44 due to overshoot in amplifier 38. Unit 46 will detect which of the leads was marked first and provide the appropriate output. Unit 46 may also provide an indication of the sign of the analogue input, it controlling the phase of the demodulator 72 appropriately. As no digit greater than 9 can be registered, if the first comparison indicates a digit 8 then digits 4 and 2 can be blocked.</abstract><edition>1</edition><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY |
title | Système de conversion |
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