Network system
A packet passed to an IEEE 1394 bus is received by a packet receiver (421) and stored into a packet buffer (422). Source and destination IDs from the packet buffer (422) are supplied to a comparison/calculation circuit (428) which are also supplied with ID values from a subnetwork routing register (...
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creator | HISAKI HIRAIWA |
description | A packet passed to an IEEE 1394 bus is received by a packet receiver (421) and stored into a packet buffer (422). Source and destination IDs from the packet buffer (422) are supplied to a comparison/calculation circuit (428) which are also supplied with ID values from a subnetwork routing register (425), bus routing register (426) and node IDs register (427). The comparison/calculation circuit (428) will judge, based on such signals, whether the packet is to be transferred, and when it decides that the packet is to be transferred, will activate the output signal and open a gate (423) to transmit the packet to an inner fabric (401). |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_AU765091BB2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>AU765091BB2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_AU765091BB23</originalsourceid><addsrcrecordid>eNrjZODzSy0pzy_KViiuLC5JzeVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGOoeZmpgaWhk5ORsZEKAEANcsebg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Network system</title><source>esp@cenet</source><creator>HISAKI HIRAIWA</creator><creatorcontrib>HISAKI HIRAIWA</creatorcontrib><description>A packet passed to an IEEE 1394 bus is received by a packet receiver (421) and stored into a packet buffer (422). Source and destination IDs from the packet buffer (422) are supplied to a comparison/calculation circuit (428) which are also supplied with ID values from a subnetwork routing register (425), bus routing register (426) and node IDs register (427). The comparison/calculation circuit (428) will judge, based on such signals, whether the packet is to be transferred, and when it decides that the packet is to be transferred, will activate the output signal and open a gate (423) to transmit the packet to an inner fabric (401).</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030911&DB=EPODOC&CC=AU&NR=765091B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030911&DB=EPODOC&CC=AU&NR=765091B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HISAKI HIRAIWA</creatorcontrib><title>Network system</title><description>A packet passed to an IEEE 1394 bus is received by a packet receiver (421) and stored into a packet buffer (422). Source and destination IDs from the packet buffer (422) are supplied to a comparison/calculation circuit (428) which are also supplied with ID values from a subnetwork routing register (425), bus routing register (426) and node IDs register (427). The comparison/calculation circuit (428) will judge, based on such signals, whether the packet is to be transferred, and when it decides that the packet is to be transferred, will activate the output signal and open a gate (423) to transmit the packet to an inner fabric (401).</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZODzSy0pzy_KViiuLC5JzeVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGOoeZmpgaWhk5ORsZEKAEANcsebg</recordid><startdate>20030911</startdate><enddate>20030911</enddate><creator>HISAKI HIRAIWA</creator><scope>EVB</scope></search><sort><creationdate>20030911</creationdate><title>Network system</title><author>HISAKI HIRAIWA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_AU765091BB23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>HISAKI HIRAIWA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HISAKI HIRAIWA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Network system</title><date>2003-09-11</date><risdate>2003</risdate><abstract>A packet passed to an IEEE 1394 bus is received by a packet receiver (421) and stored into a packet buffer (422). Source and destination IDs from the packet buffer (422) are supplied to a comparison/calculation circuit (428) which are also supplied with ID values from a subnetwork routing register (425), bus routing register (426) and node IDs register (427). The comparison/calculation circuit (428) will judge, based on such signals, whether the packet is to be transferred, and when it decides that the packet is to be transferred, will activate the output signal and open a gate (423) to transmit the packet to an inner fabric (401).</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | Network system |
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