Neural network weight distribution from a grid of memory elements

Neural inference chips for computing neural activations are provided. In various embodiments, a neural inference chip comprises at least one neural core, a memory array, an instruction buffer, and an instruction memory. The instruction buffer has a position corresponding to each of a plurality of el...

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Bibliographische Detailangaben

Hauptverfasser:	MODHA, Dharmendra, TABA, Brian Seisho, ARTHUR, John Vernon, ORTEGA OTERO, Carlos, NAYAK, Tapan, AKOPYAN, Filipp, SAWADA, Jun, DATTA, Pallab, CASSIDY, Andrew Stephen
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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