Evaluation of the Wafer-Level Voltage Ramp Test for Oxide Integrity
This report has two objectives. First, it provides both an overview and a critique of the Joint Electronic Devices Engineering Council (JEDEC) 14.2 Committee on Wafer Level Reliability standard, JESD-35, 'Procedure for the Wafer-Level Testing of Thin Dielectrics'. This procedure was develo...
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description | This report has two objectives. First, it provides both an overview and a critique of the Joint Electronic Devices Engineering Council (JEDEC) 14.2 Committee on Wafer Level Reliability standard, JESD-35, 'Procedure for the Wafer-Level Testing of Thin Dielectrics'. This procedure was developed to provide test data which are independent of the test equipment and the facility. This standard test methodology provides the integrated circuit user with a means of comparing the oxide quality between vendors. Second, this report provides an evaluation of the oxide quality of two DoD manufacturers. The test data shows that approximately ninety percent of the sampled oxides failed due to intrinsic breakdown, which indicates a high quality oxide. However, ten percent of the tested oxides exhibited early breakdown, which causes concern that the integrated circuits might fail during their expected lifetime. |
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First, it provides both an overview and a critique of the Joint Electronic Devices Engineering Council (JEDEC) 14.2 Committee on Wafer Level Reliability standard, JESD-35, 'Procedure for the Wafer-Level Testing of Thin Dielectrics'. This procedure was developed to provide test data which are independent of the test equipment and the facility. This standard test methodology provides the integrated circuit user with a means of comparing the oxide quality between vendors. Second, this report provides an evaluation of the oxide quality of two DoD manufacturers. The test data shows that approximately ninety percent of the sampled oxides failed due to intrinsic breakdown, which indicates a high quality oxide. However, ten percent of the tested oxides exhibited early breakdown, which causes concern that the integrated circuits might fail during their expected lifetime.</description><language>eng</language><subject>BREAKDOWN(ELECTRONIC THRESHOLD) ; DIELECTRICS ; Electrical and Electronic Equipment ; Electricity and Magnetism ; ELECTRONIC EQUIPMENT ; EXPERIMENTAL DATA ; Inorganic Chemistry ; INTEGRATED CIRCUITS ; JEDEC(JOINT ELECTRONIC DEVICES ENGINEERING COUNCIL) ; JESD-35 ; OXIDE INTEGRITY ; OXIDES ; PE62702F ; Physical Chemistry ; RAMPS ; RELIABILITY ; SAMPLING ; STANDARDIZATION ; TEST EQUIPMENT ; TEST METHODS ; THINNESS ; VOLTAGE ; VOLTAGE RAMP TEST ; WAFERS ; WURL2338017H</subject><creationdate>1996</creationdate><rights>APPROVED FOR PUBLIC RELEASE</rights><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>230,777,882,27549,27550</link.rule.ids><linktorsrc>$$Uhttps://apps.dtic.mil/sti/citations/ADA321625$$EView_record_in_DTIC$$FView_record_in_$$GDTIC$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Drager, Steven L</creatorcontrib><creatorcontrib>ROME LAB ROME NY</creatorcontrib><title>Evaluation of the Wafer-Level Voltage Ramp Test for Oxide Integrity</title><description>This report has two objectives. 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subjects | BREAKDOWN(ELECTRONIC THRESHOLD) DIELECTRICS Electrical and Electronic Equipment Electricity and Magnetism ELECTRONIC EQUIPMENT EXPERIMENTAL DATA Inorganic Chemistry INTEGRATED CIRCUITS JEDEC(JOINT ELECTRONIC DEVICES ENGINEERING COUNCIL) JESD-35 OXIDE INTEGRITY OXIDES PE62702F Physical Chemistry RAMPS RELIABILITY SAMPLING STANDARDIZATION TEST EQUIPMENT TEST METHODS THINNESS VOLTAGE VOLTAGE RAMP TEST WAFERS WURL2338017H |
title | Evaluation of the Wafer-Level Voltage Ramp Test for Oxide Integrity |
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