Direct Analytic Voltage Pulse Width Modulation using FPGA and Verilog HDL

This content presents a fast direct Pulse Width Modulation (PWM) algorithm for the Conventional Matrix Converters (CMC) developed in Verilog Hardware Description Language (HDL). All PWM duty cycle calculations are performed in one cycle by an atomic operation designed as a digital module using FPGA...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	Szczepankowski, Pawel
Format:	Dataset
Sprache:	eng
Schlagworte:	matrix converter Power and Energy Pulse Width Modulation Verilog HDL
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!