Direct Analytic Voltage Pulse Width Modulation using FPGA and Verilog HDL

This content presents a fast direct Pulse Width Modulation (PWM) algorithm for the Conventional Matrix Converters (CMC) developed in Verilog Hardware Description Language (HDL). All PWM duty cycle calculations are performed in one cycle by an atomic operation designed as a digital module using FPGA basic blocks. The algorithm can be extended to any number of output phase. The improved version of the discontinuous Direct Analytic Voltage PWM (DAV--PWM) method is proposed, in which the use of trigonometry, angles and program loops has been eliminated.