Evaluation of OpenMP for the Cyclops Multithreaded Architecture
Multithreaded architectures have the potential of tolerating large memory and functional unit latencies and increase resource utilization. The Blue Gene/Cyclops architecture, being developed at the IBM T. J. Watson Research Center, is one such systems that offers massive intra-chip parallelism. Alth...
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creator | Almasi, George Ayguadé, Eduard Caşcaval, Călin Castaños, José Labarta, Jesús Martínez, Francisco Martorell, Xavier Moreira, José |
description | Multithreaded architectures have the potential of tolerating large memory and functional unit latencies and increase resource utilization. The Blue Gene/Cyclops architecture, being developed at the IBM T. J. Watson Research Center, is one such systems that offers massive intra-chip parallelism. Although the BG/C architecture was initially designed to execute specific applications, we believe that it can be effectively used on a broad range of parallel numerical applications. Programming such applications for this unconventional design requires a significant porting effort when using the basic built-in mechanisms for thread management and synchronization. In this paper, we describe the implementation of an OpenMP environment for parallelizing applications, currently under development at the CEPBA-IBM Research Institute, targeting BG/C. The environment is evaluated with a set of simple numerical kernels and a subset of the NAS OpenMP benchmarks. We identify issues that were not initially considered in the design of the BG/C architecture to support a programming model such as OpenMP. We also evaluate features currently offered by the BG/C architecture that should be considered in the implementation of an efficient OpenMP layer for massive intra-chip parallel architectures. |
doi_str_mv | 10.1007/3-540-45009-2_6 |
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The Blue Gene/Cyclops architecture, being developed at the IBM T. J. Watson Research Center, is one such systems that offers massive intra-chip parallelism. Although the BG/C architecture was initially designed to execute specific applications, we believe that it can be effectively used on a broad range of parallel numerical applications. Programming such applications for this unconventional design requires a significant porting effort when using the basic built-in mechanisms for thread management and synchronization. In this paper, we describe the implementation of an OpenMP environment for parallelizing applications, currently under development at the CEPBA-IBM Research Institute, targeting BG/C. The environment is evaluated with a set of simple numerical kernels and a subset of the NAS OpenMP benchmarks. We identify issues that were not initially considered in the design of the BG/C architecture to support a programming model such as OpenMP. We also evaluate features currently offered by the BG/C architecture that should be considered in the implementation of an efficient OpenMP layer for massive intra-chip parallel architectures.</description><identifier>ISSN: 0302-9743</identifier><identifier>ISBN: 354040435X</identifier><identifier>ISBN: 9783540404354</identifier><identifier>EISSN: 1611-3349</identifier><identifier>EISBN: 9783540450092</identifier><identifier>EISBN: 3540450092</identifier><identifier>DOI: 10.1007/3-540-45009-2_6</identifier><identifier>OCLC: 52371088</identifier><identifier>LCCallNum: TK7885-7895</identifier><language>eng</language><publisher>Germany: Springer Berlin / Heidelberg</publisher><subject>Applied sciences ; Arquitectura de computadors ; Arquitectures paral·leles ; Artificial intelligence ; Computer science; control theory; systems ; Data Cache ; Exact sciences and technology ; Global Queue ; Hardware Thread ; Informàtica ; OpenMP ; Parallel programming (Computer science) ; Pattern recognition. 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The Blue Gene/Cyclops architecture, being developed at the IBM T. J. Watson Research Center, is one such systems that offers massive intra-chip parallelism. Although the BG/C architecture was initially designed to execute specific applications, we believe that it can be effectively used on a broad range of parallel numerical applications. Programming such applications for this unconventional design requires a significant porting effort when using the basic built-in mechanisms for thread management and synchronization. In this paper, we describe the implementation of an OpenMP environment for parallelizing applications, currently under development at the CEPBA-IBM Research Institute, targeting BG/C. The environment is evaluated with a set of simple numerical kernels and a subset of the NAS OpenMP benchmarks. We identify issues that were not initially considered in the design of the BG/C architecture to support a programming model such as OpenMP. We also evaluate features currently offered by the BG/C architecture that should be considered in the implementation of an efficient OpenMP layer for massive intra-chip parallel architectures.</description><subject>Applied sciences</subject><subject>Arquitectura de computadors</subject><subject>Arquitectures paral·leles</subject><subject>Artificial intelligence</subject><subject>Computer science; control theory; systems</subject><subject>Data Cache</subject><subject>Exact sciences and technology</subject><subject>Global Queue</subject><subject>Hardware Thread</subject><subject>Informàtica</subject><subject>OpenMP</subject><subject>Parallel programming (Computer science)</subject><subject>Pattern recognition. Digital image processing. Computational geometry</subject><subject>Programació en paral·lel (Informàtica)</subject><subject>Software</subject><subject>Software Thread</subject><subject>Speech and sound recognition and synthesis. Linguistics</subject><subject>Thread Creation</subject><subject>Àrees temàtiques de la UPC</subject><issn>0302-9743</issn><issn>1611-3349</issn><isbn>354040435X</isbn><isbn>9783540404354</isbn><isbn>9783540450092</isbn><isbn>3540450092</isbn><fulltext>true</fulltext><rsrctype>book_chapter</rsrctype><creationdate>2003</creationdate><recordtype>book_chapter</recordtype><sourceid>XX2</sourceid><recordid>eNpFUU1PHDEMDYVWbOmee50LxwHnOzlVaEULEggOrdSblclkulOGmWmSQeLfk91FqiXLsv2eZfsR8pXCBQXQl7yWAmohAWzNUB2RtdWGl9q-xD6QFVWU1pwLe0w-7xsguPx9QlbAgdVWC_6JnErGNQVjTsk6pb9QjIOk3K7It-sXNywu99NYTV31MIfx_rHqpljlbag2r36Y5lTdL0Pu8zYG14a2uop-2-fg8xLDF_Kxc0MK6_d4Rn59v_65uanvHn7cbq7ual9Wy-UKGxqtlFWd8qaRnWiVlo0WYGQLQYVOW6kMh8b7VlPdsNa1Vlrhue6sFPyM0MNcnxaPMfgQvcs4uf5_snMGmiGTVAhTOOcHzuySd0MX3ej7hHPsn118RSqVpRx4wdUHXCqt8U-I2EzTU0IKuBMBOZa_4v7jWEQoePY-N07_lpAyhh3BhzFHN_itm3OICZUBBRrQcCyavQHttYLc</recordid><startdate>20030101</startdate><enddate>20030101</enddate><creator>Almasi, George</creator><creator>Ayguadé, Eduard</creator><creator>Caşcaval, Călin</creator><creator>Castaños, José</creator><creator>Labarta, Jesús</creator><creator>Martínez, Francisco</creator><creator>Martorell, Xavier</creator><creator>Moreira, José</creator><general>Springer Berlin / Heidelberg</general><general>Springer Berlin Heidelberg</general><general>Springer</general><scope>FFUUA</scope><scope>IQODW</scope><scope>XX2</scope></search><sort><creationdate>20030101</creationdate><title>Evaluation of OpenMP for the Cyclops Multithreaded Architecture</title><author>Almasi, George ; Ayguadé, Eduard ; Caşcaval, Călin ; Castaños, José ; Labarta, Jesús ; Martínez, Francisco ; Martorell, Xavier ; Moreira, José</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c349t-549eb76696f6c8b5f4d675b74085d0e6ef7956830bccd717b2dad9594c37f9543</frbrgroupid><rsrctype>book_chapters</rsrctype><prefilter>book_chapters</prefilter><language>eng</language><creationdate>2003</creationdate><topic>Applied sciences</topic><topic>Arquitectura de computadors</topic><topic>Arquitectures paral·leles</topic><topic>Artificial intelligence</topic><topic>Computer science; control theory; systems</topic><topic>Data Cache</topic><topic>Exact sciences and technology</topic><topic>Global Queue</topic><topic>Hardware Thread</topic><topic>Informàtica</topic><topic>OpenMP</topic><topic>Parallel programming (Computer science)</topic><topic>Pattern recognition. Digital image processing. Computational geometry</topic><topic>Programació en paral·lel (Informàtica)</topic><topic>Software</topic><topic>Software Thread</topic><topic>Speech and sound recognition and synthesis. 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The Blue Gene/Cyclops architecture, being developed at the IBM T. J. Watson Research Center, is one such systems that offers massive intra-chip parallelism. Although the BG/C architecture was initially designed to execute specific applications, we believe that it can be effectively used on a broad range of parallel numerical applications. Programming such applications for this unconventional design requires a significant porting effort when using the basic built-in mechanisms for thread management and synchronization. In this paper, we describe the implementation of an OpenMP environment for parallelizing applications, currently under development at the CEPBA-IBM Research Institute, targeting BG/C. The environment is evaluated with a set of simple numerical kernels and a subset of the NAS OpenMP benchmarks. We identify issues that were not initially considered in the design of the BG/C architecture to support a programming model such as OpenMP. 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subjects | Applied sciences Arquitectura de computadors Arquitectures paral·leles Artificial intelligence Computer science control theory systems Data Cache Exact sciences and technology Global Queue Hardware Thread Informàtica OpenMP Parallel programming (Computer science) Pattern recognition. Digital image processing. Computational geometry Programació en paral·lel (Informàtica) Software Software Thread Speech and sound recognition and synthesis. Linguistics Thread Creation Àrees temàtiques de la UPC |
title | Evaluation of OpenMP for the Cyclops Multithreaded Architecture |
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