EVX: Vector execution on low power EDGE cores

In this paper, we present a vector execution model that provides the advantages of vector processors on low power, general purpose cores, with limited additional hardware. While accelerating data-level parallel (DLP) workloads, the vector model increases the efficiency and hardware resources utiliza...

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Bibliographische Detailangaben
Hauptverfasser:	Duric, Milovan, Palomar, Oscar, Smith, Aaron, Unsal, Osman, Cristal, Adrian, Valero, Mateo, Burger, Doug
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Arquitectura d'ordinadors Arquitectura de computadors Computational modeling Computer architecture Data-level parallel workloads DLP workloads EVX Explicit data graph execution architecture Hardware Hardware resources utilization Informàtica Kernel Low power EDGE cores Multiprocessadors Multiprocessors Power aware computing Program processors Registers Vector execution model Vector processing (Computer science) Vector processor systems Vector processors Vectors Àrees temàtiques de la UPC
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