Electromigration Study of a Novel Cu Stack-via Interconnect for Advanced High-Density Fan-Out Packaging

Cu via technology has been developed as interconnects for connecting Cu redistribution lines (RDLs) for achieving high-density packaging requirements. We presented in this article a novel Cu stack-via interconnect composed of three vias for the advanced fan-out chip on substrate (FOCoS) packaging. I...

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Veröffentlicht in:IMAPSource Proceedings 2024-04, Vol.2021 (DPC)
Hauptverfasser: Shao, Kuan-Ju, Tsai, Min-Yan, Liang, Chien-Lung, Kao, Chin-Li, Lin, Gao-Tian, Lin, Kwang-Lung
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Lin, Kwang-Lung
description Cu via technology has been developed as interconnects for connecting Cu redistribution lines (RDLs) for achieving high-density packaging requirements. We presented in this article a novel Cu stack-via interconnect composed of three vias for the advanced fan-out chip on substrate (FOCoS) packaging. It is of particular interest to evaluate the electromigration reliability of the designed high-density packaging configuration considering the potential damage resulting from the high-density electron wind impacts. In this study, the electromigration behavior of the novel Cu stack-via interconnect was investigated in terms of the electrical resistance change, and the mechanism was also explored by the microstructure evolutions. The electromigration experiment of the Si chip/Cu stack-via/Ni metallization/Sn-Ag solder/Ni(P) metallization/Cu trace structure was conducted at 0.9 A, approximately 5.1 × 10^5 A/cm² (estimated from the cross-sectional area of the 15-um-diameter via), for 591.2, 855.7, and 1450.2 h under a 180°C condition. The resistance of the two vias during the electromigration experiment, R1 via referred to the one near the Si chip and R3 via referred to the one near the solder, was investigated for comparison. The resistance changes after the electromigration experiment were expressed in a ratio form of R1/R0 compared with the initial resistance value (R1). The microstructure of the Cu stack-via interconnect was investigated using a field-emission scanning electron microscope (FESEM) accompanying energy-dispersive X-ray spectroscopy (EDS) for the phase characterization. The electromigration behavior in the Cu stack-via interconnect with respect to two electron flow directions, from Cu trace to Cu stack-via (denoted as cathodic interconnect hereafter) and from Cu stack-via to Cu trace (denoted as anodic interconnect hereafter), was also investigated. Electromigration in the R1 and R3 vias of the cathodic stack-via interconnect showed insignificant microstructure and resistance variations for up to 1450.2 h, suggesting great electromigration resistance of the novel stack-via interconnect. Similar behavior of the resistance fluctuation in a range from 0.98 to 1.02, corresponding to the intact Cu via microstructure, can be found in the R1 via of the anodic stack-via interconnect after the electromigration experiment for up to 1450.2 h. Whereas, we observed divergent electromigration behavior in the R3 via of the anodic stack-via interconnect for the micr
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We presented in this article a novel Cu stack-via interconnect composed of three vias for the advanced fan-out chip on substrate (FOCoS) packaging. It is of particular interest to evaluate the electromigration reliability of the designed high-density packaging configuration considering the potential damage resulting from the high-density electron wind impacts. In this study, the electromigration behavior of the novel Cu stack-via interconnect was investigated in terms of the electrical resistance change, and the mechanism was also explored by the microstructure evolutions. The electromigration experiment of the Si chip/Cu stack-via/Ni metallization/Sn-Ag solder/Ni(P) metallization/Cu trace structure was conducted at 0.9 A, approximately 5.1 × 10^5 A/cm² (estimated from the cross-sectional area of the 15-um-diameter via), for 591.2, 855.7, and 1450.2 h under a 180°C condition. The resistance of the two vias during the electromigration experiment, R1 via referred to the one near the Si chip and R3 via referred to the one near the solder, was investigated for comparison. The resistance changes after the electromigration experiment were expressed in a ratio form of R1/R0 compared with the initial resistance value (R1). The microstructure of the Cu stack-via interconnect was investigated using a field-emission scanning electron microscope (FESEM) accompanying energy-dispersive X-ray spectroscopy (EDS) for the phase characterization. The electromigration behavior in the Cu stack-via interconnect with respect to two electron flow directions, from Cu trace to Cu stack-via (denoted as cathodic interconnect hereafter) and from Cu stack-via to Cu trace (denoted as anodic interconnect hereafter), was also investigated. Electromigration in the R1 and R3 vias of the cathodic stack-via interconnect showed insignificant microstructure and resistance variations for up to 1450.2 h, suggesting great electromigration resistance of the novel stack-via interconnect. Similar behavior of the resistance fluctuation in a range from 0.98 to 1.02, corresponding to the intact Cu via microstructure, can be found in the R1 via of the anodic stack-via interconnect after the electromigration experiment for up to 1450.2 h. Whereas, we observed divergent electromigration behavior in the R3 via of the anodic stack-via interconnect for the microstructure and resistance response to the electric current stressing compared with that observed in the R1 via and those in the anodic interconnect. Electromigration was found to induce a prominent resistance rise in the R3 via from 1.06 (591.2 h) to 5.7 (855.7 h) and 14.29 (1450.2 h). The dramatic resistance change was attributed to the phase transformation from Cu to the Cu-Sn intermetallic compounds (IMCs) composed of Cu3Sn and Cu6Sn5 phases. The electrical resistivity of these intermetallic phases was approximately 5 to 10 times greater than that of the Cu phase. Electromigration-induced void formation can also be observed within the Cu3Sn IMC, which was regarded as another contributing factor for the resistance rise. Severe consumption of the Ni metallization that aimed for retarding the Cu diffusion occurred during the electromigration experiment, giving rise to the undesirable Cu-Sn IMC formation in the R3 via. The anisotropic Cu diffusion and polarity effect of IMC formation were proposed to be responsible for the divergence of the electromigration behavior in the Cu stack-via interconnect. The chemical potential gradient and most importantly the predominant electromigration driving force induced the complete Ni metallization consumption and thereby triggered the Cu diffusion for the phase transformation. Thickening of the Ni metallization from 2.5 um to 5 um was recommended for retarding the Cu diffusion and the effective inhibition of the Cu via phase transformation.</description><identifier>ISSN: 2380-4505</identifier><identifier>EISSN: 2380-4505</identifier><identifier>DOI: 10.4071/001c.116492</identifier><language>eng</language><ispartof>IMAPSource Proceedings, 2024-04, Vol.2021 (DPC)</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,27903,27904</link.rule.ids></links><search><creatorcontrib>Shao, Kuan-Ju</creatorcontrib><creatorcontrib>Tsai, Min-Yan</creatorcontrib><creatorcontrib>Liang, Chien-Lung</creatorcontrib><creatorcontrib>Kao, Chin-Li</creatorcontrib><creatorcontrib>Lin, Gao-Tian</creatorcontrib><creatorcontrib>Lin, Kwang-Lung</creatorcontrib><title>Electromigration Study of a Novel Cu Stack-via Interconnect for Advanced High-Density Fan-Out Packaging</title><title>IMAPSource Proceedings</title><description>Cu via technology has been developed as interconnects for connecting Cu redistribution lines (RDLs) for achieving high-density packaging requirements. We presented in this article a novel Cu stack-via interconnect composed of three vias for the advanced fan-out chip on substrate (FOCoS) packaging. It is of particular interest to evaluate the electromigration reliability of the designed high-density packaging configuration considering the potential damage resulting from the high-density electron wind impacts. In this study, the electromigration behavior of the novel Cu stack-via interconnect was investigated in terms of the electrical resistance change, and the mechanism was also explored by the microstructure evolutions. The electromigration experiment of the Si chip/Cu stack-via/Ni metallization/Sn-Ag solder/Ni(P) metallization/Cu trace structure was conducted at 0.9 A, approximately 5.1 × 10^5 A/cm² (estimated from the cross-sectional area of the 15-um-diameter via), for 591.2, 855.7, and 1450.2 h under a 180°C condition. The resistance of the two vias during the electromigration experiment, R1 via referred to the one near the Si chip and R3 via referred to the one near the solder, was investigated for comparison. The resistance changes after the electromigration experiment were expressed in a ratio form of R1/R0 compared with the initial resistance value (R1). The microstructure of the Cu stack-via interconnect was investigated using a field-emission scanning electron microscope (FESEM) accompanying energy-dispersive X-ray spectroscopy (EDS) for the phase characterization. The electromigration behavior in the Cu stack-via interconnect with respect to two electron flow directions, from Cu trace to Cu stack-via (denoted as cathodic interconnect hereafter) and from Cu stack-via to Cu trace (denoted as anodic interconnect hereafter), was also investigated. Electromigration in the R1 and R3 vias of the cathodic stack-via interconnect showed insignificant microstructure and resistance variations for up to 1450.2 h, suggesting great electromigration resistance of the novel stack-via interconnect. Similar behavior of the resistance fluctuation in a range from 0.98 to 1.02, corresponding to the intact Cu via microstructure, can be found in the R1 via of the anodic stack-via interconnect after the electromigration experiment for up to 1450.2 h. Whereas, we observed divergent electromigration behavior in the R3 via of the anodic stack-via interconnect for the microstructure and resistance response to the electric current stressing compared with that observed in the R1 via and those in the anodic interconnect. Electromigration was found to induce a prominent resistance rise in the R3 via from 1.06 (591.2 h) to 5.7 (855.7 h) and 14.29 (1450.2 h). The dramatic resistance change was attributed to the phase transformation from Cu to the Cu-Sn intermetallic compounds (IMCs) composed of Cu3Sn and Cu6Sn5 phases. The electrical resistivity of these intermetallic phases was approximately 5 to 10 times greater than that of the Cu phase. Electromigration-induced void formation can also be observed within the Cu3Sn IMC, which was regarded as another contributing factor for the resistance rise. Severe consumption of the Ni metallization that aimed for retarding the Cu diffusion occurred during the electromigration experiment, giving rise to the undesirable Cu-Sn IMC formation in the R3 via. The anisotropic Cu diffusion and polarity effect of IMC formation were proposed to be responsible for the divergence of the electromigration behavior in the Cu stack-via interconnect. The chemical potential gradient and most importantly the predominant electromigration driving force induced the complete Ni metallization consumption and thereby triggered the Cu diffusion for the phase transformation. Thickening of the Ni metallization from 2.5 um to 5 um was recommended for retarding the Cu diffusion and the effective inhibition of the Cu via phase transformation.</description><issn>2380-4505</issn><issn>2380-4505</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2024</creationdate><recordtype>article</recordtype><recordid>eNqVjz1PwzAURS0EEhVk4g-8Hbn45QsyotKqXQCp3a2H4xiL1Ea2Eyn_nlQwsHa6V1f3DIexOxTLUjzigxColoh12eQXbJEXT4KXlagu__VrlsVoP0ReITZNjQtm1r1WKfijNYGS9Q72aWgn8B0QvPpR97Aa5o3UFx8twc4lHZR3bqag8wGe25Gc0i1srfnkL9pFmybYkONvQ4L3mSNjnbllVx31UWd_ecPuN-vDastV8DEG3cnvYI8UJolCnnTkSUf-6hTnvX8AHCRQdw</recordid><startdate>20240411</startdate><enddate>20240411</enddate><creator>Shao, Kuan-Ju</creator><creator>Tsai, Min-Yan</creator><creator>Liang, Chien-Lung</creator><creator>Kao, Chin-Li</creator><creator>Lin, Gao-Tian</creator><creator>Lin, Kwang-Lung</creator><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20240411</creationdate><title>Electromigration Study of a Novel Cu Stack-via Interconnect for Advanced High-Density Fan-Out Packaging</title><author>Shao, Kuan-Ju ; Tsai, Min-Yan ; Liang, Chien-Lung ; Kao, Chin-Li ; Lin, Gao-Tian ; Lin, Kwang-Lung</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-crossref_primary_10_4071_001c_1164923</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2024</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Shao, Kuan-Ju</creatorcontrib><creatorcontrib>Tsai, Min-Yan</creatorcontrib><creatorcontrib>Liang, Chien-Lung</creatorcontrib><creatorcontrib>Kao, Chin-Li</creatorcontrib><creatorcontrib>Lin, Gao-Tian</creatorcontrib><creatorcontrib>Lin, Kwang-Lung</creatorcontrib><collection>CrossRef</collection><jtitle>IMAPSource Proceedings</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Shao, Kuan-Ju</au><au>Tsai, Min-Yan</au><au>Liang, Chien-Lung</au><au>Kao, Chin-Li</au><au>Lin, Gao-Tian</au><au>Lin, Kwang-Lung</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Electromigration Study of a Novel Cu Stack-via Interconnect for Advanced High-Density Fan-Out Packaging</atitle><jtitle>IMAPSource Proceedings</jtitle><date>2024-04-11</date><risdate>2024</risdate><volume>2021</volume><issue>DPC</issue><issn>2380-4505</issn><eissn>2380-4505</eissn><abstract>Cu via technology has been developed as interconnects for connecting Cu redistribution lines (RDLs) for achieving high-density packaging requirements. We presented in this article a novel Cu stack-via interconnect composed of three vias for the advanced fan-out chip on substrate (FOCoS) packaging. It is of particular interest to evaluate the electromigration reliability of the designed high-density packaging configuration considering the potential damage resulting from the high-density electron wind impacts. In this study, the electromigration behavior of the novel Cu stack-via interconnect was investigated in terms of the electrical resistance change, and the mechanism was also explored by the microstructure evolutions. The electromigration experiment of the Si chip/Cu stack-via/Ni metallization/Sn-Ag solder/Ni(P) metallization/Cu trace structure was conducted at 0.9 A, approximately 5.1 × 10^5 A/cm² (estimated from the cross-sectional area of the 15-um-diameter via), for 591.2, 855.7, and 1450.2 h under a 180°C condition. The resistance of the two vias during the electromigration experiment, R1 via referred to the one near the Si chip and R3 via referred to the one near the solder, was investigated for comparison. The resistance changes after the electromigration experiment were expressed in a ratio form of R1/R0 compared with the initial resistance value (R1). The microstructure of the Cu stack-via interconnect was investigated using a field-emission scanning electron microscope (FESEM) accompanying energy-dispersive X-ray spectroscopy (EDS) for the phase characterization. The electromigration behavior in the Cu stack-via interconnect with respect to two electron flow directions, from Cu trace to Cu stack-via (denoted as cathodic interconnect hereafter) and from Cu stack-via to Cu trace (denoted as anodic interconnect hereafter), was also investigated. Electromigration in the R1 and R3 vias of the cathodic stack-via interconnect showed insignificant microstructure and resistance variations for up to 1450.2 h, suggesting great electromigration resistance of the novel stack-via interconnect. Similar behavior of the resistance fluctuation in a range from 0.98 to 1.02, corresponding to the intact Cu via microstructure, can be found in the R1 via of the anodic stack-via interconnect after the electromigration experiment for up to 1450.2 h. Whereas, we observed divergent electromigration behavior in the R3 via of the anodic stack-via interconnect for the microstructure and resistance response to the electric current stressing compared with that observed in the R1 via and those in the anodic interconnect. Electromigration was found to induce a prominent resistance rise in the R3 via from 1.06 (591.2 h) to 5.7 (855.7 h) and 14.29 (1450.2 h). The dramatic resistance change was attributed to the phase transformation from Cu to the Cu-Sn intermetallic compounds (IMCs) composed of Cu3Sn and Cu6Sn5 phases. The electrical resistivity of these intermetallic phases was approximately 5 to 10 times greater than that of the Cu phase. Electromigration-induced void formation can also be observed within the Cu3Sn IMC, which was regarded as another contributing factor for the resistance rise. Severe consumption of the Ni metallization that aimed for retarding the Cu diffusion occurred during the electromigration experiment, giving rise to the undesirable Cu-Sn IMC formation in the R3 via. The anisotropic Cu diffusion and polarity effect of IMC formation were proposed to be responsible for the divergence of the electromigration behavior in the Cu stack-via interconnect. The chemical potential gradient and most importantly the predominant electromigration driving force induced the complete Ni metallization consumption and thereby triggered the Cu diffusion for the phase transformation. Thickening of the Ni metallization from 2.5 um to 5 um was recommended for retarding the Cu diffusion and the effective inhibition of the Cu via phase transformation.</abstract><doi>10.4071/001c.116492</doi></addata></record>
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