Amorphous-silicon gate-driver circuits of shared-node dual pull-down structure with overlapped output signals
— A novel gate‐driver circuit using amorphous‐silicon (a‐Si) TFTs has been developed. The circuit has a shared‐node dual pull‐down AC (SDAC) structure with a common‐node controller for two neighboring stages, resulting in a reduced number of TFTs. The overlapped clock signals widen the temperature r...
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Veröffentlicht in: | Journal of the Society for Information Display 2008-01, Vol.16 (1), p.77-81 |
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creator | Cho, Hyung Nyuck Kim, Hae Yeol Ryoo II, Chang Choi, Seung Chan Kim, Binn Jang, Yong Ho Yoon, Soo Young Chun, Min Doo Park, Kwon-shik Moon, Taewoong Cho, Nam Wook Jo, Sung Hak Kim, Sung Ki Kim, Chang-Dong Kang, In Byeong |
description | — A novel gate‐driver circuit using amorphous‐silicon (a‐Si) TFTs has been developed. The circuit has a shared‐node dual pull‐down AC (SDAC) structure with a common‐node controller for two neighboring stages, resulting in a reduced number of TFTs. The overlapped clock signals widen the temperature range for stable operation due to the extended charging time of the inner nodes of the circuit. The accelerated lifetime was found to be over 1000 hours at 60°C with good bias‐temperature‐stress (BTS) characteristics. Accordingly, the a‐Si gate‐driver circuit was successfully integrated into a 14.1‐in. XGA (1024 × RGB × 768) TFT‐LCD panel having a single bank form. |
doi_str_mv | 10.1889/1.2835039 |
format | Article |
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The circuit has a shared‐node dual pull‐down AC (SDAC) structure with a common‐node controller for two neighboring stages, resulting in a reduced number of TFTs. The overlapped clock signals widen the temperature range for stable operation due to the extended charging time of the inner nodes of the circuit. The accelerated lifetime was found to be over 1000 hours at 60°C with good bias‐temperature‐stress (BTS) characteristics. Accordingly, the a‐Si gate‐driver circuit was successfully integrated into a 14.1‐in. XGA (1024 × RGB × 768) TFT‐LCD panel having a single bank form.</description><identifier>ISSN: 1071-0922</identifier><identifier>EISSN: 1938-3657</identifier><identifier>DOI: 10.1889/1.2835039</identifier><language>eng</language><publisher>Oxford, UK: Blackwell Publishing Ltd</publisher><subject>a-Si TFT ; CLK ; dual pull-down structure ; gate driver ; overlapped ; shift register</subject><ispartof>Journal of the Society for Information Display, 2008-01, Vol.16 (1), p.77-81</ispartof><rights>2008 Society for Information Display</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c3067-a8ee5daa23173625cc20f64b4ad6e91fbd125376a09d4acc055b24e8fd3b84d43</citedby><cites>FETCH-LOGICAL-c3067-a8ee5daa23173625cc20f64b4ad6e91fbd125376a09d4acc055b24e8fd3b84d43</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1889%2F1.2835039$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1889%2F1.2835039$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,780,784,1417,27924,27925,45574,45575</link.rule.ids></links><search><creatorcontrib>Cho, Hyung Nyuck</creatorcontrib><creatorcontrib>Kim, Hae Yeol</creatorcontrib><creatorcontrib>Ryoo II, Chang</creatorcontrib><creatorcontrib>Choi, Seung Chan</creatorcontrib><creatorcontrib>Kim, Binn</creatorcontrib><creatorcontrib>Jang, Yong Ho</creatorcontrib><creatorcontrib>Yoon, Soo Young</creatorcontrib><creatorcontrib>Chun, Min Doo</creatorcontrib><creatorcontrib>Park, Kwon-shik</creatorcontrib><creatorcontrib>Moon, Taewoong</creatorcontrib><creatorcontrib>Cho, Nam Wook</creatorcontrib><creatorcontrib>Jo, Sung Hak</creatorcontrib><creatorcontrib>Kim, Sung Ki</creatorcontrib><creatorcontrib>Kim, Chang-Dong</creatorcontrib><creatorcontrib>Kang, In Byeong</creatorcontrib><title>Amorphous-silicon gate-driver circuits of shared-node dual pull-down structure with overlapped output signals</title><title>Journal of the Society for Information Display</title><description>— A novel gate‐driver circuit using amorphous‐silicon (a‐Si) TFTs has been developed. The circuit has a shared‐node dual pull‐down AC (SDAC) structure with a common‐node controller for two neighboring stages, resulting in a reduced number of TFTs. The overlapped clock signals widen the temperature range for stable operation due to the extended charging time of the inner nodes of the circuit. The accelerated lifetime was found to be over 1000 hours at 60°C with good bias‐temperature‐stress (BTS) characteristics. Accordingly, the a‐Si gate‐driver circuit was successfully integrated into a 14.1‐in. XGA (1024 × RGB × 768) TFT‐LCD panel having a single bank form.</description><subject>a-Si TFT</subject><subject>CLK</subject><subject>dual pull-down structure</subject><subject>gate driver</subject><subject>overlapped</subject><subject>shift register</subject><issn>1071-0922</issn><issn>1938-3657</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2008</creationdate><recordtype>article</recordtype><recordid>eNp1kL1OwzAYRSMEEqUw8AZeGVz8EzvJWAqUVhWIP3W0HNtpDWkc2Q6lb09QKzame6XvnG-4SXKJ0QjneXGNRySnDNHiKBngguaQcpYd9x1lGKKCkNPkLIQPhAhnKR8km_HG-XbtugCDra1yDVjJaKD29st4oKxXnY0BuAqEtfRGw8ZpA3Qna9B2dQ212zYgRN-p2HkDtjaugevVWrat0cB1se0iCHbVyDqcJydVH-bikMPk_f7ubfIAF0_T2WS8gIoinkGZG8O0lITijHLClCKo4mmZSs1NgatSY8JoxiUqdCqVQoyVJDV5pWmZpzqlw-Rq_1d5F4I3lWi93Ui_ExiJ350EFoedena0Z7e2Nrv_QTF_nd0ynvUC3As2RPP9J0j_KfprxsTycSrIzct8iZ_nAtEfPIR6bg</recordid><startdate>200801</startdate><enddate>200801</enddate><creator>Cho, Hyung Nyuck</creator><creator>Kim, Hae Yeol</creator><creator>Ryoo II, Chang</creator><creator>Choi, Seung Chan</creator><creator>Kim, Binn</creator><creator>Jang, Yong Ho</creator><creator>Yoon, Soo Young</creator><creator>Chun, Min Doo</creator><creator>Park, Kwon-shik</creator><creator>Moon, Taewoong</creator><creator>Cho, Nam Wook</creator><creator>Jo, Sung Hak</creator><creator>Kim, Sung Ki</creator><creator>Kim, Chang-Dong</creator><creator>Kang, In Byeong</creator><general>Blackwell Publishing Ltd</general><scope>BSCLL</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>200801</creationdate><title>Amorphous-silicon gate-driver circuits of shared-node dual pull-down structure with overlapped output signals</title><author>Cho, Hyung Nyuck ; Kim, Hae Yeol ; Ryoo II, Chang ; Choi, Seung Chan ; Kim, Binn ; Jang, Yong Ho ; Yoon, Soo Young ; Chun, Min Doo ; Park, Kwon-shik ; Moon, Taewoong ; Cho, Nam Wook ; Jo, Sung Hak ; Kim, Sung Ki ; Kim, Chang-Dong ; Kang, In Byeong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c3067-a8ee5daa23173625cc20f64b4ad6e91fbd125376a09d4acc055b24e8fd3b84d43</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2008</creationdate><topic>a-Si TFT</topic><topic>CLK</topic><topic>dual pull-down structure</topic><topic>gate driver</topic><topic>overlapped</topic><topic>shift register</topic><toplevel>online_resources</toplevel><creatorcontrib>Cho, Hyung Nyuck</creatorcontrib><creatorcontrib>Kim, Hae Yeol</creatorcontrib><creatorcontrib>Ryoo II, Chang</creatorcontrib><creatorcontrib>Choi, Seung Chan</creatorcontrib><creatorcontrib>Kim, Binn</creatorcontrib><creatorcontrib>Jang, Yong Ho</creatorcontrib><creatorcontrib>Yoon, Soo Young</creatorcontrib><creatorcontrib>Chun, Min Doo</creatorcontrib><creatorcontrib>Park, Kwon-shik</creatorcontrib><creatorcontrib>Moon, Taewoong</creatorcontrib><creatorcontrib>Cho, Nam Wook</creatorcontrib><creatorcontrib>Jo, Sung Hak</creatorcontrib><creatorcontrib>Kim, Sung Ki</creatorcontrib><creatorcontrib>Kim, Chang-Dong</creatorcontrib><creatorcontrib>Kang, In Byeong</creatorcontrib><collection>Istex</collection><collection>CrossRef</collection><jtitle>Journal of the Society for Information Display</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Cho, Hyung Nyuck</au><au>Kim, Hae Yeol</au><au>Ryoo II, Chang</au><au>Choi, Seung Chan</au><au>Kim, Binn</au><au>Jang, Yong Ho</au><au>Yoon, Soo Young</au><au>Chun, Min Doo</au><au>Park, Kwon-shik</au><au>Moon, Taewoong</au><au>Cho, Nam Wook</au><au>Jo, Sung Hak</au><au>Kim, Sung Ki</au><au>Kim, Chang-Dong</au><au>Kang, In Byeong</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Amorphous-silicon gate-driver circuits of shared-node dual pull-down structure with overlapped output signals</atitle><jtitle>Journal of the Society for Information Display</jtitle><date>2008-01</date><risdate>2008</risdate><volume>16</volume><issue>1</issue><spage>77</spage><epage>81</epage><pages>77-81</pages><issn>1071-0922</issn><eissn>1938-3657</eissn><abstract>— A novel gate‐driver circuit using amorphous‐silicon (a‐Si) TFTs has been developed. The circuit has a shared‐node dual pull‐down AC (SDAC) structure with a common‐node controller for two neighboring stages, resulting in a reduced number of TFTs. The overlapped clock signals widen the temperature range for stable operation due to the extended charging time of the inner nodes of the circuit. The accelerated lifetime was found to be over 1000 hours at 60°C with good bias‐temperature‐stress (BTS) characteristics. Accordingly, the a‐Si gate‐driver circuit was successfully integrated into a 14.1‐in. XGA (1024 × RGB × 768) TFT‐LCD panel having a single bank form.</abstract><cop>Oxford, UK</cop><pub>Blackwell Publishing Ltd</pub><doi>10.1889/1.2835039</doi><tpages>5</tpages></addata></record> |
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subjects | a-Si TFT CLK dual pull-down structure gate driver overlapped shift register |
title | Amorphous-silicon gate-driver circuits of shared-node dual pull-down structure with overlapped output signals |
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