Peripheral circuit designs using low-temperature p-type poly-Si thin-film transistors
— P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver fo...
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Veröffentlicht in: | Journal of the Society for Information Display 2006-04, Vol.14 (4), p.403-409 |
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creator | Nam, Woo-Jin Lee, Jae-Hoon Lee, Hye-Jin Shin, Hee-Sun Han, Min-Koo |
description | — P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver for six‐bit digital interface is proposed, and the building blocks such as latch, DAC, and analog buffer are described. The latch samples and holds the digital bits (D and D') without an output voltage loss. A new source‐follower type analog buffer is developed and exhibits a small offset deviation regardless of the VTH variation of the buffer TFT. The simulation and measurement results ensure that the proposed circuits were successfully designed for p‐type panel integration. |
doi_str_mv | 10.1889/1.2196517 |
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fullrecord | <record><control><sourceid>istex_cross</sourceid><recordid>TN_cdi_crossref_primary_10_1889_1_2196517</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>ark_67375_WNG_L8QBZGG9_K</sourcerecordid><originalsourceid>FETCH-LOGICAL-c3075-6437c08251fd906d17a34c7f79d428ff08c6c1fa3549d9fe027307cde5c063b63</originalsourceid><addsrcrecordid>eNp1kL1OwzAYRS0EEqUw8AZZGdz6J7bjEQqEQsWPSoXEYhnHbg1pEtmpSt6eoFZsTPcbzrnSdwE4x2iEs0yO8YhgyRkWB2CAJc0g5Uwc9jcSGCJJyDE4ifETIcJZygdg8WyDb1Y26DIxPpiNb5PCRr-sYrKJvlomZb2FrV03PdJugk0a2HZNH3XZwblP2pWvoPPlOmmDrqKPbR3iKThyuoz2bJ9DsLi9eZ3cwdlTPp1czqChSDDIUyoMygjDrpCIF1homhrhhCxSkjmHMsMNdpqyVBbSWURE75nCMoM4_eB0CC52vSbUMQbrVBP8WodOYaR-91BY7ffo2fGO3frSdv-D6n4-vcaUst6AO6N_yn7_GTp8KS6oYOrtMVez7OXqPc-leqA_mZFwjw</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Peripheral circuit designs using low-temperature p-type poly-Si thin-film transistors</title><source>Wiley Journals</source><creator>Nam, Woo-Jin ; Lee, Jae-Hoon ; Lee, Hye-Jin ; Shin, Hee-Sun ; Han, Min-Koo</creator><creatorcontrib>Nam, Woo-Jin ; Lee, Jae-Hoon ; Lee, Hye-Jin ; Shin, Hee-Sun ; Han, Min-Koo</creatorcontrib><description>— P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver for six‐bit digital interface is proposed, and the building blocks such as latch, DAC, and analog buffer are described. The latch samples and holds the digital bits (D and D') without an output voltage loss. A new source‐follower type analog buffer is developed and exhibits a small offset deviation regardless of the VTH variation of the buffer TFT. The simulation and measurement results ensure that the proposed circuits were successfully designed for p‐type panel integration.</description><identifier>ISSN: 1071-0922</identifier><identifier>EISSN: 1938-3657</identifier><identifier>DOI: 10.1889/1.2196517</identifier><language>eng</language><publisher>Oxford, UK: Blackwell Publishing Ltd</publisher><subject>analog buffer ; latch ; level shifter ; LTPS ; p-type ; poly-Si ; shift register ; SOG</subject><ispartof>Journal of the Society for Information Display, 2006-04, Vol.14 (4), p.403-409</ispartof><rights>2006 Society for Information Display</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c3075-6437c08251fd906d17a34c7f79d428ff08c6c1fa3549d9fe027307cde5c063b63</citedby><cites>FETCH-LOGICAL-c3075-6437c08251fd906d17a34c7f79d428ff08c6c1fa3549d9fe027307cde5c063b63</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1889%2F1.2196517$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1889%2F1.2196517$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,780,784,1417,27924,27925,45574,45575</link.rule.ids></links><search><creatorcontrib>Nam, Woo-Jin</creatorcontrib><creatorcontrib>Lee, Jae-Hoon</creatorcontrib><creatorcontrib>Lee, Hye-Jin</creatorcontrib><creatorcontrib>Shin, Hee-Sun</creatorcontrib><creatorcontrib>Han, Min-Koo</creatorcontrib><title>Peripheral circuit designs using low-temperature p-type poly-Si thin-film transistors</title><title>Journal of the Society for Information Display</title><description>— P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver for six‐bit digital interface is proposed, and the building blocks such as latch, DAC, and analog buffer are described. The latch samples and holds the digital bits (D and D') without an output voltage loss. A new source‐follower type analog buffer is developed and exhibits a small offset deviation regardless of the VTH variation of the buffer TFT. The simulation and measurement results ensure that the proposed circuits were successfully designed for p‐type panel integration.</description><subject>analog buffer</subject><subject>latch</subject><subject>level shifter</subject><subject>LTPS</subject><subject>p-type</subject><subject>poly-Si</subject><subject>shift register</subject><subject>SOG</subject><issn>1071-0922</issn><issn>1938-3657</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2006</creationdate><recordtype>article</recordtype><recordid>eNp1kL1OwzAYRS0EEqUw8AZZGdz6J7bjEQqEQsWPSoXEYhnHbg1pEtmpSt6eoFZsTPcbzrnSdwE4x2iEs0yO8YhgyRkWB2CAJc0g5Uwc9jcSGCJJyDE4ifETIcJZygdg8WyDb1Y26DIxPpiNb5PCRr-sYrKJvlomZb2FrV03PdJugk0a2HZNH3XZwblP2pWvoPPlOmmDrqKPbR3iKThyuoz2bJ9DsLi9eZ3cwdlTPp1czqChSDDIUyoMygjDrpCIF1homhrhhCxSkjmHMsMNdpqyVBbSWURE75nCMoM4_eB0CC52vSbUMQbrVBP8WodOYaR-91BY7ffo2fGO3frSdv-D6n4-vcaUst6AO6N_yn7_GTp8KS6oYOrtMVez7OXqPc-leqA_mZFwjw</recordid><startdate>200604</startdate><enddate>200604</enddate><creator>Nam, Woo-Jin</creator><creator>Lee, Jae-Hoon</creator><creator>Lee, Hye-Jin</creator><creator>Shin, Hee-Sun</creator><creator>Han, Min-Koo</creator><general>Blackwell Publishing Ltd</general><scope>BSCLL</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>200604</creationdate><title>Peripheral circuit designs using low-temperature p-type poly-Si thin-film transistors</title><author>Nam, Woo-Jin ; Lee, Jae-Hoon ; Lee, Hye-Jin ; Shin, Hee-Sun ; Han, Min-Koo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c3075-6437c08251fd906d17a34c7f79d428ff08c6c1fa3549d9fe027307cde5c063b63</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2006</creationdate><topic>analog buffer</topic><topic>latch</topic><topic>level shifter</topic><topic>LTPS</topic><topic>p-type</topic><topic>poly-Si</topic><topic>shift register</topic><topic>SOG</topic><toplevel>online_resources</toplevel><creatorcontrib>Nam, Woo-Jin</creatorcontrib><creatorcontrib>Lee, Jae-Hoon</creatorcontrib><creatorcontrib>Lee, Hye-Jin</creatorcontrib><creatorcontrib>Shin, Hee-Sun</creatorcontrib><creatorcontrib>Han, Min-Koo</creatorcontrib><collection>Istex</collection><collection>CrossRef</collection><jtitle>Journal of the Society for Information Display</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Nam, Woo-Jin</au><au>Lee, Jae-Hoon</au><au>Lee, Hye-Jin</au><au>Shin, Hee-Sun</au><au>Han, Min-Koo</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Peripheral circuit designs using low-temperature p-type poly-Si thin-film transistors</atitle><jtitle>Journal of the Society for Information Display</jtitle><date>2006-04</date><risdate>2006</risdate><volume>14</volume><issue>4</issue><spage>403</spage><epage>409</epage><pages>403-409</pages><issn>1071-0922</issn><eissn>1938-3657</eissn><abstract>— P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver for six‐bit digital interface is proposed, and the building blocks such as latch, DAC, and analog buffer are described. The latch samples and holds the digital bits (D and D') without an output voltage loss. A new source‐follower type analog buffer is developed and exhibits a small offset deviation regardless of the VTH variation of the buffer TFT. The simulation and measurement results ensure that the proposed circuits were successfully designed for p‐type panel integration.</abstract><cop>Oxford, UK</cop><pub>Blackwell Publishing Ltd</pub><doi>10.1889/1.2196517</doi><tpages>7</tpages></addata></record> |
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subjects | analog buffer latch level shifter LTPS p-type poly-Si shift register SOG |
title | Peripheral circuit designs using low-temperature p-type poly-Si thin-film transistors |
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