Approaching DRAM performance by using microsecond-latency flash memory for small-sized random read accesses: a new access method and its graph applications

For applications in which small-sized random accesses frequently occur for datasets that exceed DRAM capacity, placing the datasets on SSD can result in poor application performance. For the read-intensive case we focus on in this paper, low latency flash memory with microsecond read latency is a pr...

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Veröffentlicht in:Proceedings of the VLDB Endowment 2021-04, Vol.14 (8), p.1311-1324
Hauptverfasser: Suzuki, Tomoya, Hiwada, Kazuhiro, Kajihara, Hirotsugu, Sano, Shintaro, Nomura, Shuou, Shiozawa, Tatsuo
Format: Artikel
Sprache:eng
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