Low latency optical switch for high performance computing with minimized processor energy load [invited]
Power density and cooling issues are limiting the performance of high performance chip multiprocessors (CMPs), and off-chip communications currently consume more than 20% of power for memory, coherence, PCI, and Ethernet links. Photonic transceivers integrated with CMPs are being developed to overco...
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Veröffentlicht in: | Journal of optical communications and networking 2015-03, Vol.7 (3), p.A498-A510 |
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Hauptverfasser: | , , , , , , |
Format: | Artikel |
Sprache: | eng |
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