(Invited) Metrology Along the Gate-All-Around Logic Roadmap: From Nanosheet to Complementary Field-Effect Transistors

For over 50 years, improving the functionality per unit area has been the driving force of the semiconductor industry. Since the advent of fin field effect transistors (FETs), however, this has come at the expense of an increasingly complex device architecture . This is particularly true today as the industry is transitioning from finFETs to nanosheet (NSH) FETs. The integration of the latter devices indeed introduces the use e.g. of a modified substrate with an epitaxial SiGe/Si superlattice, of lateral etching and of size-constrained and buried gate stacks. Novel metrology concepts are therefore required to control all these new processing steps. This presentation will start by reviewing the metrology challenges encountered along the different steps of the gate-all-around (GAA) logic roadmap, from NSH to Complementary FET (CFET) [1-3]. As will be shown, the sought information moves from the surface to increasingly deeper regions of the device. This is leading to the need for so-called 3D metrology techniques focusing on buried features [4]. We will then dive into the 3D metrology solution space and demonstrate the concrete use of some of these techniques for GAA logic metrology. We conclude that, although many capabilities remain to be demonstrated, the solution space is vast such that GAA logic metrology is not expected to suffer from a capability gap. However, we foresee a heavier resort to slower solutions, which is likely to lead to a throughput or capacity gap. Luc van den Hove, The endless progression of Moore's law , Proceeding of SPIE Advanced Lithography + Patterning, PC1205301 (2022) Liao, Complementary Field-Effect Transistor (CFET) Demonstration at 48nm Gate Pitch for Future Logic Technology Scaling , IEDM 2023 M. Radosavljević et al., Demonstration of a Stacked CMOS Inverter at 60nm Gate Pitch with Power Via and Direct Backside Device Contacts , IEDM 2023 J. Bogdanowicz et al., Semiconductor metrology for the 3D era , Proc. SPIE 12496, Metrology, Inspection, and Process Control XXXVII, 1249617