Junctionless Ge MOSFETs Fabricated on 10 nm-Thick GeOI Substrate

Junctionless field-effect transistor (FET) has recently been proposed for Si nanowire FETs. It avoids junction formation process and shows less sensitive to the channel interface. Here, we demonstrate junctionless FET fabricated on 11 nm-thick heavily doped p-type Ge-on-insulator (GeOI) substrate wh...

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Hauptverfasser: Zhao, Dan Dan, Nishimura, Tomonori, Lee, Choong-hyun, Ifuku, Ryota, Nagashio, Kosuke, Kita, Koji, Toriumi, Akira
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container_start_page 457
container_title
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creator Zhao, Dan Dan
Nishimura, Tomonori
Lee, Choong-hyun
Ifuku, Ryota
Nagashio, Kosuke
Kita, Koji
Toriumi, Akira
description Junctionless field-effect transistor (FET) has recently been proposed for Si nanowire FETs. It avoids junction formation process and shows less sensitive to the channel interface. Here, we demonstrate junctionless FET fabricated on 11 nm-thick heavily doped p-type Ge-on-insulator (GeOI) substrate which combines the higher hole mobility in Ge than in Si with all junctionless FET advantages. The device shows similar I-V characteristics with conventional FETs, and the Ion/Ioff ratio is larger than 104. In addition, the field effect mobility seems to be rather flat with regard to the carrier density. What's more, the Ge junctionless p-FET has better doping flexibility thanks to the strong Fermi level pinning at metal/Ge interface.
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title Junctionless Ge MOSFETs Fabricated on 10 nm-Thick GeOI Substrate
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