Growth and Processing Defects in CMOS Homo- and Hetero-Epitaxy

The impact of different processing steps on the electrical properties of homo- and hetero-epitaxial junctions deposited on silicon substrates is described. In particular, the influence of the pre-epi in situ cleaning, using a high temperature bake in H2 is investigated. It is shown that the removal...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Simoen, Eddy, Bargallo Gonzalez, Mireia, Eneman, Geert, Rosseel, Eric, Hikavyy, Andriy Y., Kobayashi, D., Loo, Roger, Caymax, Matty, Claeys, Cor
Format: Tagungsbericht
Sprache:eng
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 768
container_issue 1
container_start_page 761
container_title
container_volume 34
creator Simoen, Eddy
Bargallo Gonzalez, Mireia
Eneman, Geert
Rosseel, Eric
Hikavyy, Andriy Y.
Kobayashi, D.
Loo, Roger
Caymax, Matty
Claeys, Cor
description The impact of different processing steps on the electrical properties of homo- and hetero-epitaxial junctions deposited on silicon substrates is described. In particular, the influence of the pre-epi in situ cleaning, using a high temperature bake in H2 is investigated. It is shown that the removal of oxygen and carbon from the starting surface is crucial in obtaining high-quality, low-leakage epitaxial junctions. In addition, it is demonstrated that post-epi implantation and anneal should be carefully optimized in order to maintain the strain in SiGe layers and to control the defect formation.
doi_str_mv 10.1149/1.3567670
format Conference Proceeding
fullrecord <record><control><sourceid>crossref</sourceid><recordid>TN_cdi_crossref_primary_10_1149_1_3567670</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>10_1149_1_3567670</sourcerecordid><originalsourceid>FETCH-LOGICAL-c189t-a4a331fb5a9a065bbd8307c37ee45453337fb9044639938922ac4be8b8442a403</originalsourceid><addsrcrecordid>eNotj81KAzEYRYMoWKsL3yBbF6nJfPndCDLWjtDSgroOSZrRETspyYD27a06q3sXh8s9CF0zOmOMm1s2AyGVVPQETZgBTaQCdTp2oWV1ji5K-aBUHnE1QXeLnL6Gd-z6Ld7kFGIpXf-GH2Ibw1Bw1-N6tX7GTdol8gc1cYg5kfm-G9z34RKdte6zxKsxp-j1cf5SN2S5XjzV90sSmDYDcdwBsNYLZxyVwvutBqoCqBi54AIAVOsN5VyCOR41VeUC91F7zXnlOIUpuvnfDTmVkmNr97nbuXywjNpfccvsKA4_Xt1ISA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Growth and Processing Defects in CMOS Homo- and Hetero-Epitaxy</title><source>IOP Publishing Journals</source><source>Institute of Physics (IOP) Journals - HEAL-Link</source><creator>Simoen, Eddy ; Bargallo Gonzalez, Mireia ; Eneman, Geert ; Rosseel, Eric ; Hikavyy, Andriy Y. ; Kobayashi, D. ; Loo, Roger ; Caymax, Matty ; Claeys, Cor</creator><creatorcontrib>Simoen, Eddy ; Bargallo Gonzalez, Mireia ; Eneman, Geert ; Rosseel, Eric ; Hikavyy, Andriy Y. ; Kobayashi, D. ; Loo, Roger ; Caymax, Matty ; Claeys, Cor</creatorcontrib><description>The impact of different processing steps on the electrical properties of homo- and hetero-epitaxial junctions deposited on silicon substrates is described. In particular, the influence of the pre-epi in situ cleaning, using a high temperature bake in H2 is investigated. It is shown that the removal of oxygen and carbon from the starting surface is crucial in obtaining high-quality, low-leakage epitaxial junctions. In addition, it is demonstrated that post-epi implantation and anneal should be carefully optimized in order to maintain the strain in SiGe layers and to control the defect formation.</description><identifier>ISSN: 1938-5862</identifier><identifier>EISSN: 1938-6737</identifier><identifier>DOI: 10.1149/1.3567670</identifier><language>eng</language><ispartof>ECS transactions, 2011, Vol.34 (1), p.761-768</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,27924,27925</link.rule.ids></links><search><creatorcontrib>Simoen, Eddy</creatorcontrib><creatorcontrib>Bargallo Gonzalez, Mireia</creatorcontrib><creatorcontrib>Eneman, Geert</creatorcontrib><creatorcontrib>Rosseel, Eric</creatorcontrib><creatorcontrib>Hikavyy, Andriy Y.</creatorcontrib><creatorcontrib>Kobayashi, D.</creatorcontrib><creatorcontrib>Loo, Roger</creatorcontrib><creatorcontrib>Caymax, Matty</creatorcontrib><creatorcontrib>Claeys, Cor</creatorcontrib><title>Growth and Processing Defects in CMOS Homo- and Hetero-Epitaxy</title><title>ECS transactions</title><description>The impact of different processing steps on the electrical properties of homo- and hetero-epitaxial junctions deposited on silicon substrates is described. In particular, the influence of the pre-epi in situ cleaning, using a high temperature bake in H2 is investigated. It is shown that the removal of oxygen and carbon from the starting surface is crucial in obtaining high-quality, low-leakage epitaxial junctions. In addition, it is demonstrated that post-epi implantation and anneal should be carefully optimized in order to maintain the strain in SiGe layers and to control the defect formation.</description><issn>1938-5862</issn><issn>1938-6737</issn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><recordid>eNotj81KAzEYRYMoWKsL3yBbF6nJfPndCDLWjtDSgroOSZrRETspyYD27a06q3sXh8s9CF0zOmOMm1s2AyGVVPQETZgBTaQCdTp2oWV1ji5K-aBUHnE1QXeLnL6Gd-z6Ld7kFGIpXf-GH2Ibw1Bw1-N6tX7GTdol8gc1cYg5kfm-G9z34RKdte6zxKsxp-j1cf5SN2S5XjzV90sSmDYDcdwBsNYLZxyVwvutBqoCqBi54AIAVOsN5VyCOR41VeUC91F7zXnlOIUpuvnfDTmVkmNr97nbuXywjNpfccvsKA4_Xt1ISA</recordid><startdate>20110101</startdate><enddate>20110101</enddate><creator>Simoen, Eddy</creator><creator>Bargallo Gonzalez, Mireia</creator><creator>Eneman, Geert</creator><creator>Rosseel, Eric</creator><creator>Hikavyy, Andriy Y.</creator><creator>Kobayashi, D.</creator><creator>Loo, Roger</creator><creator>Caymax, Matty</creator><creator>Claeys, Cor</creator><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20110101</creationdate><title>Growth and Processing Defects in CMOS Homo- and Hetero-Epitaxy</title><author>Simoen, Eddy ; Bargallo Gonzalez, Mireia ; Eneman, Geert ; Rosseel, Eric ; Hikavyy, Andriy Y. ; Kobayashi, D. ; Loo, Roger ; Caymax, Matty ; Claeys, Cor</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c189t-a4a331fb5a9a065bbd8307c37ee45453337fb9044639938922ac4be8b8442a403</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Simoen, Eddy</creatorcontrib><creatorcontrib>Bargallo Gonzalez, Mireia</creatorcontrib><creatorcontrib>Eneman, Geert</creatorcontrib><creatorcontrib>Rosseel, Eric</creatorcontrib><creatorcontrib>Hikavyy, Andriy Y.</creatorcontrib><creatorcontrib>Kobayashi, D.</creatorcontrib><creatorcontrib>Loo, Roger</creatorcontrib><creatorcontrib>Caymax, Matty</creatorcontrib><creatorcontrib>Claeys, Cor</creatorcontrib><collection>CrossRef</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Simoen, Eddy</au><au>Bargallo Gonzalez, Mireia</au><au>Eneman, Geert</au><au>Rosseel, Eric</au><au>Hikavyy, Andriy Y.</au><au>Kobayashi, D.</au><au>Loo, Roger</au><au>Caymax, Matty</au><au>Claeys, Cor</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Growth and Processing Defects in CMOS Homo- and Hetero-Epitaxy</atitle><btitle>ECS transactions</btitle><date>2011-01-01</date><risdate>2011</risdate><volume>34</volume><issue>1</issue><spage>761</spage><epage>768</epage><pages>761-768</pages><issn>1938-5862</issn><eissn>1938-6737</eissn><abstract>The impact of different processing steps on the electrical properties of homo- and hetero-epitaxial junctions deposited on silicon substrates is described. In particular, the influence of the pre-epi in situ cleaning, using a high temperature bake in H2 is investigated. It is shown that the removal of oxygen and carbon from the starting surface is crucial in obtaining high-quality, low-leakage epitaxial junctions. In addition, it is demonstrated that post-epi implantation and anneal should be carefully optimized in order to maintain the strain in SiGe layers and to control the defect formation.</abstract><doi>10.1149/1.3567670</doi><tpages>8</tpages></addata></record>
fulltext fulltext
identifier ISSN: 1938-5862
ispartof ECS transactions, 2011, Vol.34 (1), p.761-768
issn 1938-5862
1938-6737
language eng
recordid cdi_crossref_primary_10_1149_1_3567670
source IOP Publishing Journals; Institute of Physics (IOP) Journals - HEAL-Link
title Growth and Processing Defects in CMOS Homo- and Hetero-Epitaxy
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-27T21%3A23%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Growth%20and%20Processing%20Defects%20in%20CMOS%20Homo-%20and%20Hetero-Epitaxy&rft.btitle=ECS%20transactions&rft.au=Simoen,%20Eddy&rft.date=2011-01-01&rft.volume=34&rft.issue=1&rft.spage=761&rft.epage=768&rft.pages=761-768&rft.issn=1938-5862&rft.eissn=1938-6737&rft_id=info:doi/10.1149/1.3567670&rft_dat=%3Ccrossref%3E10_1149_1_3567670%3C/crossref%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true