Novel Application of Wafer-Bonded MultiSOI: Junctionless Nanowire Transistors for CMOS Logic

In this paper, we report on the fabrication and characterization of voltage-programmable (VP) nanowire (NW) field-effect-transistor (FET) devices suitable to enhance the flexibility in circuit design, such as of reconfigurable logic. Silicon NW-structures with mid-gap Schottky S/D junctions on silic...

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Hauptverfasser: Wessely, Frank, Krauss, Tillmann, Schwalke, Udo
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description In this paper, we report on the fabrication and characterization of voltage-programmable (VP) nanowire (NW) field-effect-transistor (FET) devices suitable to enhance the flexibility in circuit design, such as of reconfigurable logic. Silicon NW-structures with mid-gap Schottky S/D junctions on silicon-on-insulator (SOI) substrate were fabricated performing as unipolar CMOS-like transistors. The desired device type, i.e. NMOS or PMOS, is programmed by application of a certain back-gate voltage. The programming capabilities of the devices fabricated using this approach are demonstrated experimentally using a VP-NW-CMOS inverter circuit on a multi-SOI-substrate like set-up.
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title Novel Application of Wafer-Bonded MultiSOI: Junctionless Nanowire Transistors for CMOS Logic
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