Challenges in FEOL Logic Device Integration for 32 nm Technology Node and Beyond

Challenges in FEOL Logic Device Integration for 32 nm Technology Node and Beyond

This paper provides a forum for reviewing and discussing new elements and challenges in the front end of line (FEOL) process integration for 32nm logic devices in the following areas: Metal/high-k (MHK) gate stack, mobility enhancement substrate technology and strain engineering.

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Park, Dae-Gyu, Chudzik, Mike, Yin, Haizhou
Format: Tagungsbericht
Sprache:eng
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This paper provides a forum for reviewing and discussing new elements and challenges in the front end of line (FEOL) process integration for 32nm logic devices in the following areas: Metal/high-k (MHK) gate stack, mobility enhancement substrate technology and strain engineering.
ISSN:1938-5862
1938-6737
DOI:10.1149/1.2778394