Jitter-based Adaptive True Random Number Generation Circuits for FPGAs in the Cloud

In this article, we present and evaluate a true random number generator (TRNG) design that is compatible with the restrictions imposed by cloud-based Field Programmable Gate Array (FPGA) providers such as Amazon Web Services (AWS) EC2 F1. Because cloud FPGA providers disallow the ring oscillator cir...

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Veröffentlicht in:ACM transactions on reconfigurable technology and systems 2023-01, Vol.16 (1), p.1-20, Article 3
Hauptverfasser: Li, Xiang, Stanwicks, Peter, Provelengios, George, Tessier, Russell, Holcomb, Daniel
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creator Li, Xiang
Stanwicks, Peter
Provelengios, George
Tessier, Russell
Holcomb, Daniel
description In this article, we present and evaluate a true random number generator (TRNG) design that is compatible with the restrictions imposed by cloud-based Field Programmable Gate Array (FPGA) providers such as Amazon Web Services (AWS) EC2 F1. Because cloud FPGA providers disallow the ring oscillator circuits that conventionally generate TRNG entropy, our design is oscillator-free and uses clock jitter as its entropy source. The clock jitter is harvested with a time-to-digital converter (TDC) and a controllable delay line that is continuously tuned to compensate for process, voltage, and temperature variations. After describing the design, we present and validate a stochastic model that conservatively quantifies its worst-case entropy. We deploy and model the design in the cloud on 60 EC2 F1 FPGA instances to ensure sufficient randomness is captured. TRNG entropy is further validated using NIST test suites, and experiments are performed to understand how the TRNG responds to on-die power attacks that disturb the FPGA supply voltage in the vicinity of the TRNG. After introducing and validating our basic TRNG design, we introduce and validate a new variant that uses four instances of a linkable sampling module to increase the entropy per sample and improve throughput. The new variant improves throughput by 250% at a modest 17% increase in CLB count.
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subjects Cryptography
Hardware
Reconfigurable logic and FPGAs
Security and privacy
title Jitter-based Adaptive True Random Number Generation Circuits for FPGAs in the Cloud
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