READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications

In this work, we propose a framework called REconfigurable Accelerator DeploY (READY), the first framework to support polynomial runtime mapping of dataflow applications in high-performance CPU-FPGA platforms. READY introduces an efficient mapping with fine-grained multithreading onto an overlay arc...

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Veröffentlicht in:	ACM transactions on embedded computing systems 2019-10, Vol.18 (5s), p.1-20
Hauptverfasser:	Silva, Lucas Bragança Da, Ferreira, Ricardo, Canesche, Michael, Menezes, Marcelo M., Vieira, Maria D., Penha, Jeronimo, Jamieson, Peter, Nacif, José Augusto M.
Format:	Artikel
Sprache:	eng
Online-Zugang:	Volltext
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