Area-efficiency in CMP core design: co-optimization of microarchitecture and physical design

In this paper, we examine the area-performance design space of a processing core for a chip multiprocessor (CMP), considering both the architectural design space and the tradeoffs of the physical design on which the architecture relies. We first propose a methodology for performing an integrated opt...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	Computer architecture news 2009-05, Vol.37 (2), p.56-65
Hauptverfasser:	Azizi, Omid, Mahesri, Aqeel, Patel, Sanjay J., Horowitz, Mark
Format:	Artikel
Sprache:	eng
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!