Dislocation Generation of III-V Semiconductors by the Biaxial Stress in GaAs/SiO 2 , InP/SiO 2 and III-V/Si Structure

Dislocation generation of III-V compound semiconductor crystals caused by the biaxial stress in SiO 2 film on GaAs and InP wafers has been observed. The biaxial stress of around 10 8 dyn/cm 2 generates dislocations of around 10 7 cm -2 above 450°C, which is the ordinary thin-film crystal growth temperature. The temperature dependence of critical stress for dislocation formation agreed with that reported for the upper yield stress of bulk III-V crystals. This shows that dislocation generation of III-V semiconductors basically occurs when the biaxial stress exceeds the upper yield stress of the materials. Comparing this experiment and the III-V/Si heteroepitaxy structure, it is suggested that the dislocation generation of III-V/Si in the cooling stage is also caused by thermal mismatch. Great thermal mismatches of GaAs and Si materials produce thermal stress sufficient for dislocation generation.