Atomic layer deposited ultrathin metal nitride barrier layers for ruthenium interconnect applications
Resistance capacitance time delay in Cu interconnects is becoming a significant factor requiring further performance improvements in future nanoelectronic devices. Choice of alternate interconnect materials, for example, refractory metals, and subsequent integration with underlying barrier and liner...
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creator | Dey, Sonal Yu, Kai-Hung Consiglio, Steven Tapily, Kandabara Hakamata, Takahiro Wajda, Cory S. Leusink, Gert J. Jordan-Sweet, Jean Lavoie, Christian Muir, David Moreno, Beatriz Diebold, Alain C. |
description | Resistance capacitance time delay in Cu interconnects is becoming a significant factor requiring further performance improvements in future nanoelectronic devices. Choice of alternate interconnect materials, for example, refractory metals, and subsequent integration with underlying barrier and liner layers are extremely challenging for the sub-10 nm nodes. The development of conformal deposition processes for alternate interconnects, liner, and barrier materials are crucial in order for implementation of a possible replacement for Cu interconnects for narrow line widths. In this study, the authors report on ultrathin (∼3 nm) chemical vapor deposition (CVD) grown ruthenium films on 0.5 and 1 nm thick metal nitride (TiN, TaN) barrier layers deposited via atomic layer deposition (ALD). Using scanning electron microscopy, the authors determined the effect of the underlying barrier layer on the coverage of the ruthenium overlayer. The authors utilized synchrotron x-ray diffraction with in situ rapid thermal annealing to investigate the thermal stability of the barrier layers and determine the effective activation energies of barrier failure leading to ruthenium monosilicide formation. For Ru films deposited directly on Si and on 0.5 nm MN (M = Ti, Ta) covered Si substrates, silicide formation proceeds via a two-step crystallization process involving lateral nucleation above ∼440 °C followed by thickening of the ruthenium monosilicide layer above ∼520 °C. This silicidation temperature of ∼440 °C could be potentially problematic in back-end-of-the-line (BEOL) processing since it is close to the typical thermal budget used. However ∼1 nm thick ALD MN (M = Ti, Ta) was found to be adequate to block silicide formation up to ∼580 and ∼620 °C for TiN and TaN, respectively, and also aided in superior coverage of the CVD ruthenium overlayer (>90%). The results reported here might be useful to ascertain annealing temperature and time for BEOL process and integration optimization without reaching a state where ruthenium silicides start forming. |
doi_str_mv | 10.1116/1.4979709 |
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Choice of alternate interconnect materials, for example, refractory metals, and subsequent integration with underlying barrier and liner layers are extremely challenging for the sub-10 nm nodes. The development of conformal deposition processes for alternate interconnects, liner, and barrier materials are crucial in order for implementation of a possible replacement for Cu interconnects for narrow line widths. In this study, the authors report on ultrathin (∼3 nm) chemical vapor deposition (CVD) grown ruthenium films on 0.5 and 1 nm thick metal nitride (TiN, TaN) barrier layers deposited via atomic layer deposition (ALD). Using scanning electron microscopy, the authors determined the effect of the underlying barrier layer on the coverage of the ruthenium overlayer. The authors utilized synchrotron x-ray diffraction with in situ rapid thermal annealing to investigate the thermal stability of the barrier layers and determine the effective activation energies of barrier failure leading to ruthenium monosilicide formation. For Ru films deposited directly on Si and on 0.5 nm MN (M = Ti, Ta) covered Si substrates, silicide formation proceeds via a two-step crystallization process involving lateral nucleation above ∼440 °C followed by thickening of the ruthenium monosilicide layer above ∼520 °C. This silicidation temperature of ∼440 °C could be potentially problematic in back-end-of-the-line (BEOL) processing since it is close to the typical thermal budget used. However ∼1 nm thick ALD MN (M = Ti, Ta) was found to be adequate to block silicide formation up to ∼580 and ∼620 °C for TiN and TaN, respectively, and also aided in superior coverage of the CVD ruthenium overlayer (>90%). The results reported here might be useful to ascertain annealing temperature and time for BEOL process and integration optimization without reaching a state where ruthenium silicides start forming.</description><identifier>ISSN: 0734-2101</identifier><identifier>EISSN: 1520-8559</identifier><identifier>DOI: 10.1116/1.4979709</identifier><identifier>CODEN: JVTAD6</identifier><language>eng</language><ispartof>Journal of vacuum science & technology. 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A, Vacuum, surfaces, and films</title><description>Resistance capacitance time delay in Cu interconnects is becoming a significant factor requiring further performance improvements in future nanoelectronic devices. Choice of alternate interconnect materials, for example, refractory metals, and subsequent integration with underlying barrier and liner layers are extremely challenging for the sub-10 nm nodes. The development of conformal deposition processes for alternate interconnects, liner, and barrier materials are crucial in order for implementation of a possible replacement for Cu interconnects for narrow line widths. In this study, the authors report on ultrathin (∼3 nm) chemical vapor deposition (CVD) grown ruthenium films on 0.5 and 1 nm thick metal nitride (TiN, TaN) barrier layers deposited via atomic layer deposition (ALD). Using scanning electron microscopy, the authors determined the effect of the underlying barrier layer on the coverage of the ruthenium overlayer. The authors utilized synchrotron x-ray diffraction with in situ rapid thermal annealing to investigate the thermal stability of the barrier layers and determine the effective activation energies of barrier failure leading to ruthenium monosilicide formation. For Ru films deposited directly on Si and on 0.5 nm MN (M = Ti, Ta) covered Si substrates, silicide formation proceeds via a two-step crystallization process involving lateral nucleation above ∼440 °C followed by thickening of the ruthenium monosilicide layer above ∼520 °C. This silicidation temperature of ∼440 °C could be potentially problematic in back-end-of-the-line (BEOL) processing since it is close to the typical thermal budget used. However ∼1 nm thick ALD MN (M = Ti, Ta) was found to be adequate to block silicide formation up to ∼580 and ∼620 °C for TiN and TaN, respectively, and also aided in superior coverage of the CVD ruthenium overlayer (>90%). The results reported here might be useful to ascertain annealing temperature and time for BEOL process and integration optimization without reaching a state where ruthenium silicides start forming.</description><issn>0734-2101</issn><issn>1520-8559</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2017</creationdate><recordtype>article</recordtype><recordid>eNp90EtLAzEUBeAgCtbqwn-QrcLU3Ewyj2UpvqDgRtdDJrmhkZlkSFKh_95aiy4EV2fzcTgcQq6BLQCguoOFaOu2Zu0JmYHkrGikbE_JjNWlKDgwOCcXKb0zxjhn1YzgMofRaTqoHUZqcArJZTR0O-So8sZ5OmJWA_UuR2eQ9ipGt5cHn6gNkcZt3qB325E6nzHq4D3qTNU0DU6r7IJPl-TMqiHh1THn5O3h_nX1VKxfHp9Xy3WhBWO5AIttxVsAw5UFpU1jUXFbKVBN35i6RCuElEIKrCTnkpeswbLvOQrkslblnNx89-oYUopouym6UcVdB6z7-qeD7vjP3t5-26RdPsz8wR8h_sJuMvY__Lf5ExOqdsw</recordid><startdate>20170501</startdate><enddate>20170501</enddate><creator>Dey, Sonal</creator><creator>Yu, Kai-Hung</creator><creator>Consiglio, Steven</creator><creator>Tapily, Kandabara</creator><creator>Hakamata, Takahiro</creator><creator>Wajda, Cory S.</creator><creator>Leusink, Gert J.</creator><creator>Jordan-Sweet, Jean</creator><creator>Lavoie, Christian</creator><creator>Muir, David</creator><creator>Moreno, Beatriz</creator><creator>Diebold, Alain C.</creator><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20170501</creationdate><title>Atomic layer deposited ultrathin metal nitride barrier layers for ruthenium interconnect applications</title><author>Dey, Sonal ; Yu, Kai-Hung ; Consiglio, Steven ; Tapily, Kandabara ; Hakamata, Takahiro ; Wajda, Cory S. ; Leusink, Gert J. ; Jordan-Sweet, Jean ; Lavoie, Christian ; Muir, David ; Moreno, Beatriz ; Diebold, Alain C.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c400t-1fe962911d2af1acd8fea2f6a1a8b8d73ef4455454e652252308e3bb2e4e257a3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2017</creationdate><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Dey, Sonal</creatorcontrib><creatorcontrib>Yu, Kai-Hung</creatorcontrib><creatorcontrib>Consiglio, Steven</creatorcontrib><creatorcontrib>Tapily, Kandabara</creatorcontrib><creatorcontrib>Hakamata, Takahiro</creatorcontrib><creatorcontrib>Wajda, Cory S.</creatorcontrib><creatorcontrib>Leusink, Gert J.</creatorcontrib><creatorcontrib>Jordan-Sweet, Jean</creatorcontrib><creatorcontrib>Lavoie, Christian</creatorcontrib><creatorcontrib>Muir, David</creatorcontrib><creatorcontrib>Moreno, Beatriz</creatorcontrib><creatorcontrib>Diebold, Alain C.</creatorcontrib><collection>CrossRef</collection><jtitle>Journal of vacuum science & technology. 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A, Vacuum, surfaces, and films</jtitle><date>2017-05-01</date><risdate>2017</risdate><volume>35</volume><issue>3</issue><issn>0734-2101</issn><eissn>1520-8559</eissn><coden>JVTAD6</coden><abstract>Resistance capacitance time delay in Cu interconnects is becoming a significant factor requiring further performance improvements in future nanoelectronic devices. Choice of alternate interconnect materials, for example, refractory metals, and subsequent integration with underlying barrier and liner layers are extremely challenging for the sub-10 nm nodes. The development of conformal deposition processes for alternate interconnects, liner, and barrier materials are crucial in order for implementation of a possible replacement for Cu interconnects for narrow line widths. In this study, the authors report on ultrathin (∼3 nm) chemical vapor deposition (CVD) grown ruthenium films on 0.5 and 1 nm thick metal nitride (TiN, TaN) barrier layers deposited via atomic layer deposition (ALD). Using scanning electron microscopy, the authors determined the effect of the underlying barrier layer on the coverage of the ruthenium overlayer. The authors utilized synchrotron x-ray diffraction with in situ rapid thermal annealing to investigate the thermal stability of the barrier layers and determine the effective activation energies of barrier failure leading to ruthenium monosilicide formation. For Ru films deposited directly on Si and on 0.5 nm MN (M = Ti, Ta) covered Si substrates, silicide formation proceeds via a two-step crystallization process involving lateral nucleation above ∼440 °C followed by thickening of the ruthenium monosilicide layer above ∼520 °C. This silicidation temperature of ∼440 °C could be potentially problematic in back-end-of-the-line (BEOL) processing since it is close to the typical thermal budget used. However ∼1 nm thick ALD MN (M = Ti, Ta) was found to be adequate to block silicide formation up to ∼580 and ∼620 °C for TiN and TaN, respectively, and also aided in superior coverage of the CVD ruthenium overlayer (>90%). The results reported here might be useful to ascertain annealing temperature and time for BEOL process and integration optimization without reaching a state where ruthenium silicides start forming.</abstract><doi>10.1116/1.4979709</doi><tpages>8</tpages><oa>free_for_read</oa></addata></record> |
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title | Atomic layer deposited ultrathin metal nitride barrier layers for ruthenium interconnect applications |
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