Array Termination Impacts in Advanced SRAM

An essential goal of the static random access memory (SRAM) array termination design is to both terminate as well as maintain a homogeneous environment for the active edge cells in the array. Local layout effects (LLEs) in the array termination design can exert influence on the active array SRAM dev...

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Veröffentlicht in:	IEEE transactions on very large scale integration (VLSI) systems 2017-09, Vol.25 (9), p.2449-2457
Hauptverfasser:	Mann, Randy W., Puri, Sandeep, Sheng Xie, Marienfeld, Daniel, Versaggi, Joseph, Bianzhu Fu, Gribelyuk, Michael, Thankalekshmi, Ratheesh R., Xiaoqiang Zhang, Hui Zang, Weintraub, Chad E.
Format:	Artikel
Sprache:	eng
Schlagworte:	Arrays Bit cell Current measurement Layout local layout effect (LLE) Logic gates Random access memory static noise margin (SNM) static random access memory (SRAM) statistics Stress Systematics technology scaling variation write margin yield
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