Sequence-Aware Watermark Design for Soft IP Embedded Processors

This paper describes a design approach for incorporating sequence-aware watermarks in soft intellectual property (IP) embedded processors. The influence of watermark sequence parameters on detection, area, and power overheads is examined, and consequently a method for incorporating sequence-aware wa...

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Veröffentlicht in:	IEEE transactions on very large scale integration (VLSI) systems 2016-01, Vol.24 (1), p.276-289
Hauptverfasser:	Kufel, Jedrzej, Wilson, Peter Reid, Hill, Stephen, Al-Hashimi, Bashir M., Whatmough, Paul N.
Format:	Artikel
Sprache:	eng
Schlagworte:	Correlation Correlation power analysis (CPA) Costs Design engineering Embedded computer systems embedded processors Hardware Integrated circuits intellectual property (IP) protection IP networks Noise Program processors Robustness Vectors Very large scale integration Watermarking
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