Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications
The need to support various digital signal processing (DSP) and classification applications on energy-constrained devices has steadily grown. Such applications often extensively perform matrix multiplications using fixed-point arithmetic while exhibiting tolerance for some computational errors. Henc...
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Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2015-06, Vol.23 (6), p.1180-1184 |
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container_title | IEEE transactions on very large scale integration (VLSI) systems |
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creator | Narayanamoorthy, Srinivasan Moghaddam, Hadi Asghari Zhenhong Liu Taejoon Park Nam Sung Kim |
description | The need to support various digital signal processing (DSP) and classification applications on energy-constrained devices has steadily grown. Such applications often extensively perform matrix multiplications using fixed-point arithmetic while exhibiting tolerance for some computational errors. Hence, improving the energy efficiency of multiplications is critical. In this brief, we propose multiplier architectures that can tradeoff computational accuracy with energy consumption at design time. Compared with a precise multiplier, the proposed multiplier can consume 58% less energy/op with average computational error of \sim 1 %. Finally, we demonstrate that such a small computational error does not notably impact the quality of DSP and the accuracy of classification applications. |
doi_str_mv | 10.1109/TVLSI.2014.2333366 |
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Finally, we demonstrate that such a small computational error does not notably impact the quality of DSP and the accuracy of classification applications.</description><subject>Accuracy</subject><subject>Algorithm design and analysis</subject><subject>Approximation</subject><subject>Digital signal processing</subject><subject>Energy consumption</subject><subject>energy efficiency</subject><subject>Image recognition</subject><subject>Multiplexing</subject><subject>multiplication</subject><subject>Very large scale integration</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kN9KwzAUxoMoOKcvoDd5gc78b3M56tRBRWHT25KkSYnUtiQV3Nubuc1z853DOb8PzgfALUYLjJG8335Um_WCIMwWhKYS4gzMMOd5JlOdpx4JmhUEo0twFeMnSpdMohnwq96GdpetnPPG236Cy3EMw4__UpOFL9_d5MfOGzX5oYduCPDBt35SHdz4tk_yFgZjY_R9C1XfwLJTaXAnIHmd4HgNLpzqor056hy8P6625XNWvT6ty2WVGcbxlBnUEGYsN9hgpTRrtNQ8p4Iyp4V0OSGiQazQsihowyyiudON1jatjc65o3NADr4mDDEG6-oxpG_Crsao3odV_4VV78Oqj2El6O4AeWvtPyAKXiAq6S-qK2m_</recordid><startdate>20150601</startdate><enddate>20150601</enddate><creator>Narayanamoorthy, Srinivasan</creator><creator>Moghaddam, Hadi Asghari</creator><creator>Zhenhong Liu</creator><creator>Taejoon Park</creator><creator>Nam Sung Kim</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20150601</creationdate><title>Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications</title><author>Narayanamoorthy, Srinivasan ; Moghaddam, Hadi Asghari ; Zhenhong Liu ; Taejoon Park ; Nam Sung Kim</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c451t-c0d24ce5c1c1aab4db9b573634fb69f7226d048b9883d4e037fbdbbe4fbcb75f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Accuracy</topic><topic>Algorithm design and analysis</topic><topic>Approximation</topic><topic>Digital signal processing</topic><topic>Energy consumption</topic><topic>energy efficiency</topic><topic>Image recognition</topic><topic>Multiplexing</topic><topic>multiplication</topic><topic>Very large scale integration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Narayanamoorthy, Srinivasan</creatorcontrib><creatorcontrib>Moghaddam, Hadi Asghari</creatorcontrib><creatorcontrib>Zhenhong Liu</creatorcontrib><creatorcontrib>Taejoon Park</creatorcontrib><creatorcontrib>Nam Sung Kim</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Narayanamoorthy, Srinivasan</au><au>Moghaddam, Hadi Asghari</au><au>Zhenhong Liu</au><au>Taejoon Park</au><au>Nam Sung Kim</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications</atitle><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle><stitle>TVLSI</stitle><date>2015-06-01</date><risdate>2015</risdate><volume>23</volume><issue>6</issue><spage>1180</spage><epage>1184</epage><pages>1180-1184</pages><issn>1063-8210</issn><eissn>1557-9999</eissn><coden>IEVSE9</coden><abstract>The need to support various digital signal processing (DSP) and classification applications on energy-constrained devices has steadily grown. Such applications often extensively perform matrix multiplications using fixed-point arithmetic while exhibiting tolerance for some computational errors. Hence, improving the energy efficiency of multiplications is critical. In this brief, we propose multiplier architectures that can tradeoff computational accuracy with energy consumption at design time. Compared with a precise multiplier, the proposed multiplier can consume 58% less energy/op with average computational error of \sim 1 %. Finally, we demonstrate that such a small computational error does not notably impact the quality of DSP and the accuracy of classification applications.</abstract><pub>IEEE</pub><doi>10.1109/TVLSI.2014.2333366</doi><tpages>5</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Accuracy Algorithm design and analysis Approximation Digital signal processing Energy consumption energy efficiency Image recognition Multiplexing multiplication Very large scale integration |
title | Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications |
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