A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology

A boosting pass gate (BPG) suitable for a programmable routing switch including a c-axis aligned crystal In-Ga-Zn-O (CAAC-IGZO) field effect transistor (FET) is proposed. The CAAC-IGZO is one of crystalline oxide semiconductors (OS). The proposed BPG (OS-based BPG, OS BPG) has a combination of a pas...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on very large scale integration (VLSI) systems 2015-03, Vol.23 (3), p.422-434
Hauptverfasser: Okamoto, Yuki, Nakagawa, Takashi, Aoki, Takeshi, Ikeda, Masataka, Kozuma, Munehiro, Osada, Takeshi, Kurokawa, Yoshiyuki, Ikeda, Takayuki, Yamade, Naoto, Okazaki, Yutaka, Miyairi, Hidekazu, Fujita, Masahiro, Koyama, Jun, Yamazaki, Shunpei
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 434
container_issue 3
container_start_page 422
container_title IEEE transactions on very large scale integration (VLSI) systems
container_volume 23
creator Okamoto, Yuki
Nakagawa, Takashi
Aoki, Takeshi
Ikeda, Masataka
Kozuma, Munehiro
Osada, Takeshi
Kurokawa, Yoshiyuki
Ikeda, Takayuki
Yamade, Naoto
Okazaki, Yutaka
Miyairi, Hidekazu
Fujita, Masahiro
Koyama, Jun
Yamazaki, Shunpei
description A boosting pass gate (BPG) suitable for a programmable routing switch including a c-axis aligned crystal In-Ga-Zn-O (CAAC-IGZO) field effect transistor (FET) is proposed. The CAAC-IGZO is one of crystalline oxide semiconductors (OS). The proposed BPG (OS-based BPG, OS BPG) has a combination of a pass gate (PG) and a configuration memory (CM) cell utilizing a CAAC-IGZO FET with extremely low OFF-state current and a storage capacitor. This OS BPG achieves a routing switch with fewer transistors than a conventional routing switch having a combination of a PG and an static RAM (SRAM) cell. Owing to the boosting effect, the switching characteristics, at not only positive transition but also negative transition of input signals, of the OS BPG are improved without using overdriving. In circuits fabricated with a hybrid process of a CMOSFET and a CAAC-IGZO FET with gate lengths of 0.5 and 1.0 μm, the net delays of the OS BPG, 75 and 58 ns, at driving voltages of 2.0 and 2.5 V have been found to be less than those of the conventional routing switch (SRAM-based PG, SRAM PG) by about 79% and 62%, respectively. It has also been confirmed that a field-programmable gate array (FPGA) chip utilizing the OS BPG as a routing switch reduces the layout areas of routing switches and the whole chip by 61% and 22%, respectively, and increases the maximum operating frequencies at driving voltage of 2.0 and 2.5 V by about 2.8 times and 1.6 times of those of the FPGA chip utilizing the SRAM PG as a routing switch.
doi_str_mv 10.1109/TVLSI.2014.2316871
format Article
fullrecord <record><control><sourceid>crossref_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TVLSI_2014_2316871</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6816099</ieee_id><sourcerecordid>10_1109_TVLSI_2014_2316871</sourcerecordid><originalsourceid>FETCH-LOGICAL-c407t-4ae256137720f50f8aaa0d7d03bf3892dabeb3aa1f52c94a82594c8e0c8f42a43</originalsourceid><addsrcrecordid>eNo9kE1OwzAUBiMEEqVwAdj4Ai628-tlG0GJVFFEC0hsohfHboySuLJDUa_CaUnaCm-eF9_MYjzvlpIJpYTfr98Xq2zCCA0mzKdREtMzb0TDMMa8f-f9n0Q-Thgll96Vc1-kXwacjLzfKZoZ4zrdbtALOIfm0En0obsKZc3Wmp0s0epHd6IaFmkFFkQnre4J4RC0JXo2aLmTtrR6N0yUsejFmo2FpoGilujVfB_sRwuageuVpkWp3bsO6lq3EmUtngP-bPESraWoWlObzf7au1BQO3lzumPv7fFhnT7hxXKepdMFFgGJOxyAZGFE_ThmRIVEJQBAyrgkfqH8hLMSCln4AFSFTPAAEhbyQCSSiEQFDAJ_7LGjV1jjnJUq31rdgN3nlORD3fxQNx_q5qe6PXR3hLSU8h-IEhoRzv0_i1Z5Rg</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology</title><source>IEEE Electronic Library (IEL)</source><creator>Okamoto, Yuki ; Nakagawa, Takashi ; Aoki, Takeshi ; Ikeda, Masataka ; Kozuma, Munehiro ; Osada, Takeshi ; Kurokawa, Yoshiyuki ; Ikeda, Takayuki ; Yamade, Naoto ; Okazaki, Yutaka ; Miyairi, Hidekazu ; Fujita, Masahiro ; Koyama, Jun ; Yamazaki, Shunpei</creator><creatorcontrib>Okamoto, Yuki ; Nakagawa, Takashi ; Aoki, Takeshi ; Ikeda, Masataka ; Kozuma, Munehiro ; Osada, Takeshi ; Kurokawa, Yoshiyuki ; Ikeda, Takayuki ; Yamade, Naoto ; Okazaki, Yutaka ; Miyairi, Hidekazu ; Fujita, Masahiro ; Koyama, Jun ; Yamazaki, Shunpei</creatorcontrib><description>A boosting pass gate (BPG) suitable for a programmable routing switch including a c-axis aligned crystal In-Ga-Zn-O (CAAC-IGZO) field effect transistor (FET) is proposed. The CAAC-IGZO is one of crystalline oxide semiconductors (OS). The proposed BPG (OS-based BPG, OS BPG) has a combination of a pass gate (PG) and a configuration memory (CM) cell utilizing a CAAC-IGZO FET with extremely low OFF-state current and a storage capacitor. This OS BPG achieves a routing switch with fewer transistors than a conventional routing switch having a combination of a PG and an static RAM (SRAM) cell. Owing to the boosting effect, the switching characteristics, at not only positive transition but also negative transition of input signals, of the OS BPG are improved without using overdriving. In circuits fabricated with a hybrid process of a CMOSFET and a CAAC-IGZO FET with gate lengths of 0.5 and 1.0 μm, the net delays of the OS BPG, 75 and 58 ns, at driving voltages of 2.0 and 2.5 V have been found to be less than those of the conventional routing switch (SRAM-based PG, SRAM PG) by about 79% and 62%, respectively. It has also been confirmed that a field-programmable gate array (FPGA) chip utilizing the OS BPG as a routing switch reduces the layout areas of routing switches and the whole chip by 61% and 22%, respectively, and increases the maximum operating frequencies at driving voltage of 2.0 and 2.5 V by about 2.8 times and 1.6 times of those of the FPGA chip utilizing the SRAM PG as a routing switch.</description><identifier>ISSN: 1063-8210</identifier><identifier>EISSN: 1557-9999</identifier><identifier>DOI: 10.1109/TVLSI.2014.2316871</identifier><identifier>CODEN: IEVSE9</identifier><language>eng</language><publisher>IEEE</publisher><subject>Boosting effect ; Field effect transistors ; field-programmable gate array (FPGA) ; In-Ga-Zn-O (IGZO) ; Logic gates ; oxide semiconductor ; programmable logic device ; programmable switch ; Random access memory ; reconfigurable system ; Routing ; Switches ; Tin</subject><ispartof>IEEE transactions on very large scale integration (VLSI) systems, 2015-03, Vol.23 (3), p.422-434</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c407t-4ae256137720f50f8aaa0d7d03bf3892dabeb3aa1f52c94a82594c8e0c8f42a43</citedby><cites>FETCH-LOGICAL-c407t-4ae256137720f50f8aaa0d7d03bf3892dabeb3aa1f52c94a82594c8e0c8f42a43</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6816099$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6816099$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Okamoto, Yuki</creatorcontrib><creatorcontrib>Nakagawa, Takashi</creatorcontrib><creatorcontrib>Aoki, Takeshi</creatorcontrib><creatorcontrib>Ikeda, Masataka</creatorcontrib><creatorcontrib>Kozuma, Munehiro</creatorcontrib><creatorcontrib>Osada, Takeshi</creatorcontrib><creatorcontrib>Kurokawa, Yoshiyuki</creatorcontrib><creatorcontrib>Ikeda, Takayuki</creatorcontrib><creatorcontrib>Yamade, Naoto</creatorcontrib><creatorcontrib>Okazaki, Yutaka</creatorcontrib><creatorcontrib>Miyairi, Hidekazu</creatorcontrib><creatorcontrib>Fujita, Masahiro</creatorcontrib><creatorcontrib>Koyama, Jun</creatorcontrib><creatorcontrib>Yamazaki, Shunpei</creatorcontrib><title>A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology</title><title>IEEE transactions on very large scale integration (VLSI) systems</title><addtitle>TVLSI</addtitle><description>A boosting pass gate (BPG) suitable for a programmable routing switch including a c-axis aligned crystal In-Ga-Zn-O (CAAC-IGZO) field effect transistor (FET) is proposed. The CAAC-IGZO is one of crystalline oxide semiconductors (OS). The proposed BPG (OS-based BPG, OS BPG) has a combination of a pass gate (PG) and a configuration memory (CM) cell utilizing a CAAC-IGZO FET with extremely low OFF-state current and a storage capacitor. This OS BPG achieves a routing switch with fewer transistors than a conventional routing switch having a combination of a PG and an static RAM (SRAM) cell. Owing to the boosting effect, the switching characteristics, at not only positive transition but also negative transition of input signals, of the OS BPG are improved without using overdriving. In circuits fabricated with a hybrid process of a CMOSFET and a CAAC-IGZO FET with gate lengths of 0.5 and 1.0 μm, the net delays of the OS BPG, 75 and 58 ns, at driving voltages of 2.0 and 2.5 V have been found to be less than those of the conventional routing switch (SRAM-based PG, SRAM PG) by about 79% and 62%, respectively. It has also been confirmed that a field-programmable gate array (FPGA) chip utilizing the OS BPG as a routing switch reduces the layout areas of routing switches and the whole chip by 61% and 22%, respectively, and increases the maximum operating frequencies at driving voltage of 2.0 and 2.5 V by about 2.8 times and 1.6 times of those of the FPGA chip utilizing the SRAM PG as a routing switch.</description><subject>Boosting effect</subject><subject>Field effect transistors</subject><subject>field-programmable gate array (FPGA)</subject><subject>In-Ga-Zn-O (IGZO)</subject><subject>Logic gates</subject><subject>oxide semiconductor</subject><subject>programmable logic device</subject><subject>programmable switch</subject><subject>Random access memory</subject><subject>reconfigurable system</subject><subject>Routing</subject><subject>Switches</subject><subject>Tin</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1OwzAUBiMEEqVwAdj4Ai628-tlG0GJVFFEC0hsohfHboySuLJDUa_CaUnaCm-eF9_MYjzvlpIJpYTfr98Xq2zCCA0mzKdREtMzb0TDMMa8f-f9n0Q-Thgll96Vc1-kXwacjLzfKZoZ4zrdbtALOIfm0En0obsKZc3Wmp0s0epHd6IaFmkFFkQnre4J4RC0JXo2aLmTtrR6N0yUsejFmo2FpoGilujVfB_sRwuageuVpkWp3bsO6lq3EmUtngP-bPESraWoWlObzf7au1BQO3lzumPv7fFhnT7hxXKepdMFFgGJOxyAZGFE_ThmRIVEJQBAyrgkfqH8hLMSCln4AFSFTPAAEhbyQCSSiEQFDAJ_7LGjV1jjnJUq31rdgN3nlORD3fxQNx_q5qe6PXR3hLSU8h-IEhoRzv0_i1Z5Rg</recordid><startdate>20150301</startdate><enddate>20150301</enddate><creator>Okamoto, Yuki</creator><creator>Nakagawa, Takashi</creator><creator>Aoki, Takeshi</creator><creator>Ikeda, Masataka</creator><creator>Kozuma, Munehiro</creator><creator>Osada, Takeshi</creator><creator>Kurokawa, Yoshiyuki</creator><creator>Ikeda, Takayuki</creator><creator>Yamade, Naoto</creator><creator>Okazaki, Yutaka</creator><creator>Miyairi, Hidekazu</creator><creator>Fujita, Masahiro</creator><creator>Koyama, Jun</creator><creator>Yamazaki, Shunpei</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20150301</creationdate><title>A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology</title><author>Okamoto, Yuki ; Nakagawa, Takashi ; Aoki, Takeshi ; Ikeda, Masataka ; Kozuma, Munehiro ; Osada, Takeshi ; Kurokawa, Yoshiyuki ; Ikeda, Takayuki ; Yamade, Naoto ; Okazaki, Yutaka ; Miyairi, Hidekazu ; Fujita, Masahiro ; Koyama, Jun ; Yamazaki, Shunpei</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c407t-4ae256137720f50f8aaa0d7d03bf3892dabeb3aa1f52c94a82594c8e0c8f42a43</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Boosting effect</topic><topic>Field effect transistors</topic><topic>field-programmable gate array (FPGA)</topic><topic>In-Ga-Zn-O (IGZO)</topic><topic>Logic gates</topic><topic>oxide semiconductor</topic><topic>programmable logic device</topic><topic>programmable switch</topic><topic>Random access memory</topic><topic>reconfigurable system</topic><topic>Routing</topic><topic>Switches</topic><topic>Tin</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Okamoto, Yuki</creatorcontrib><creatorcontrib>Nakagawa, Takashi</creatorcontrib><creatorcontrib>Aoki, Takeshi</creatorcontrib><creatorcontrib>Ikeda, Masataka</creatorcontrib><creatorcontrib>Kozuma, Munehiro</creatorcontrib><creatorcontrib>Osada, Takeshi</creatorcontrib><creatorcontrib>Kurokawa, Yoshiyuki</creatorcontrib><creatorcontrib>Ikeda, Takayuki</creatorcontrib><creatorcontrib>Yamade, Naoto</creatorcontrib><creatorcontrib>Okazaki, Yutaka</creatorcontrib><creatorcontrib>Miyairi, Hidekazu</creatorcontrib><creatorcontrib>Fujita, Masahiro</creatorcontrib><creatorcontrib>Koyama, Jun</creatorcontrib><creatorcontrib>Yamazaki, Shunpei</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Okamoto, Yuki</au><au>Nakagawa, Takashi</au><au>Aoki, Takeshi</au><au>Ikeda, Masataka</au><au>Kozuma, Munehiro</au><au>Osada, Takeshi</au><au>Kurokawa, Yoshiyuki</au><au>Ikeda, Takayuki</au><au>Yamade, Naoto</au><au>Okazaki, Yutaka</au><au>Miyairi, Hidekazu</au><au>Fujita, Masahiro</au><au>Koyama, Jun</au><au>Yamazaki, Shunpei</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology</atitle><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle><stitle>TVLSI</stitle><date>2015-03-01</date><risdate>2015</risdate><volume>23</volume><issue>3</issue><spage>422</spage><epage>434</epage><pages>422-434</pages><issn>1063-8210</issn><eissn>1557-9999</eissn><coden>IEVSE9</coden><abstract>A boosting pass gate (BPG) suitable for a programmable routing switch including a c-axis aligned crystal In-Ga-Zn-O (CAAC-IGZO) field effect transistor (FET) is proposed. The CAAC-IGZO is one of crystalline oxide semiconductors (OS). The proposed BPG (OS-based BPG, OS BPG) has a combination of a pass gate (PG) and a configuration memory (CM) cell utilizing a CAAC-IGZO FET with extremely low OFF-state current and a storage capacitor. This OS BPG achieves a routing switch with fewer transistors than a conventional routing switch having a combination of a PG and an static RAM (SRAM) cell. Owing to the boosting effect, the switching characteristics, at not only positive transition but also negative transition of input signals, of the OS BPG are improved without using overdriving. In circuits fabricated with a hybrid process of a CMOSFET and a CAAC-IGZO FET with gate lengths of 0.5 and 1.0 μm, the net delays of the OS BPG, 75 and 58 ns, at driving voltages of 2.0 and 2.5 V have been found to be less than those of the conventional routing switch (SRAM-based PG, SRAM PG) by about 79% and 62%, respectively. It has also been confirmed that a field-programmable gate array (FPGA) chip utilizing the OS BPG as a routing switch reduces the layout areas of routing switches and the whole chip by 61% and 22%, respectively, and increases the maximum operating frequencies at driving voltage of 2.0 and 2.5 V by about 2.8 times and 1.6 times of those of the FPGA chip utilizing the SRAM PG as a routing switch.</abstract><pub>IEEE</pub><doi>10.1109/TVLSI.2014.2316871</doi><tpages>13</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 1063-8210
ispartof IEEE transactions on very large scale integration (VLSI) systems, 2015-03, Vol.23 (3), p.422-434
issn 1063-8210
1557-9999
language eng
recordid cdi_crossref_primary_10_1109_TVLSI_2014_2316871
source IEEE Electronic Library (IEL)
subjects Boosting effect
Field effect transistors
field-programmable gate array (FPGA)
In-Ga-Zn-O (IGZO)
Logic gates
oxide semiconductor
programmable logic device
programmable switch
Random access memory
reconfigurable system
Routing
Switches
Tin
title A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T12%3A29%3A00IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Boosting%20Pass%20Gate%20With%20Improved%20Switching%20Characteristics%20and%20No%20Overdriving%20for%20Programmable%20Routing%20Switch%20Based%20on%20Crystalline%20In-Ga-Zn-O%20Technology&rft.jtitle=IEEE%20transactions%20on%20very%20large%20scale%20integration%20(VLSI)%20systems&rft.au=Okamoto,%20Yuki&rft.date=2015-03-01&rft.volume=23&rft.issue=3&rft.spage=422&rft.epage=434&rft.pages=422-434&rft.issn=1063-8210&rft.eissn=1557-9999&rft.coden=IEVSE9&rft_id=info:doi/10.1109/TVLSI.2014.2316871&rft_dat=%3Ccrossref_RIE%3E10_1109_TVLSI_2014_2316871%3C/crossref_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6816099&rfr_iscdi=true