Compact Test Generation With an Influence Input Measure for Launch-On-Capture Transition Fault Testing
We propose a compact test generation method for transition faults based on a conflict avoidance driven scheme. A new measure is proposed to estimate the influence inputs, which is the subset of inputs to be specified, needed for detecting transition faults. The value requirements at the pseudoprimar...
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| Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2014-09, Vol.22 (9), p.1968-1979 |
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| container_end_page | 1979 |
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| container_issue | 9 |
| container_start_page | 1968 |
| container_title | IEEE transactions on very large scale integration (VLSI) systems |
| container_volume | 22 |
| creator | Xiang, Dong Sui, Wenjie Yin, Boxue Cheng, Kwang-Ting |
| description | We propose a compact test generation method for transition faults based on a conflict avoidance driven scheme. A new measure is proposed to estimate the influence inputs, which is the subset of inputs to be specified, needed for detecting transition faults. The value requirements at the pseudoprimary inputs (PPIs) of the second frame of the automatic test pattern generation circuit model are partitioned into separate subsets. The sequential backtracing scheme backtraces the value requirements on the PPIs of the second frame subset-by-subset. Justification of the necessary value requirements at the PPIs in the second frame is completed using a conflict-driven procedure. With an influence input measure for transition faults under the launch-on-capture scan testing application scheme, a new dynamic test compaction scheme is proposed. The new test compaction scheme tries to compact as many faults as possible into the current test. Experimental results and comparison with existing approaches demonstrate the efficiency and effectiveness of the proposed method. |
| doi_str_mv | 10.1109/TVLSI.2013.2280170 |
| format | Article |
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A new measure is proposed to estimate the influence inputs, which is the subset of inputs to be specified, needed for detecting transition faults. The value requirements at the pseudoprimary inputs (PPIs) of the second frame of the automatic test pattern generation circuit model are partitioned into separate subsets. The sequential backtracing scheme backtraces the value requirements on the PPIs of the second frame subset-by-subset. Justification of the necessary value requirements at the PPIs in the second frame is completed using a conflict-driven procedure. With an influence input measure for transition faults under the launch-on-capture scan testing application scheme, a new dynamic test compaction scheme is proposed. The new test compaction scheme tries to compact as many faults as possible into the current test. Experimental results and comparison with existing approaches demonstrate the efficiency and effectiveness of the proposed method.</description><identifier>ISSN: 1063-8210</identifier><identifier>EISSN: 1557-9999</identifier><identifier>DOI: 10.1109/TVLSI.2013.2280170</identifier><identifier>CODEN: IEVSE9</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>At-speed testing ; Automatic test pattern generation ; Avoidance ; Circuit faults ; Circuits ; Compaction ; Delays ; Dynamic tests ; Environmental protection ; Estimates ; Faults ; Frames ; launch-on-capture (LOC) delay testing ; Logic gates ; Pattern generation ; test data compression ; test response compaction ; Vectors ; Very large scale integration</subject><ispartof>IEEE transactions on very large scale integration (VLSI) systems, 2014-09, Vol.22 (9), p.1968-1979</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Sep 2014</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c398t-d56cf214699abfb4148f038ec80b706e6cbc9708e97c39d07bfe14f03b2927d03</citedby><cites>FETCH-LOGICAL-c398t-d56cf214699abfb4148f038ec80b706e6cbc9708e97c39d07bfe14f03b2927d03</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6609109$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27903,27904,54737</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6609109$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Xiang, Dong</creatorcontrib><creatorcontrib>Sui, Wenjie</creatorcontrib><creatorcontrib>Yin, Boxue</creatorcontrib><creatorcontrib>Cheng, Kwang-Ting</creatorcontrib><title>Compact Test Generation With an Influence Input Measure for Launch-On-Capture Transition Fault Testing</title><title>IEEE transactions on very large scale integration (VLSI) systems</title><addtitle>TVLSI</addtitle><description>We propose a compact test generation method for transition faults based on a conflict avoidance driven scheme. A new measure is proposed to estimate the influence inputs, which is the subset of inputs to be specified, needed for detecting transition faults. The value requirements at the pseudoprimary inputs (PPIs) of the second frame of the automatic test pattern generation circuit model are partitioned into separate subsets. The sequential backtracing scheme backtraces the value requirements on the PPIs of the second frame subset-by-subset. Justification of the necessary value requirements at the PPIs in the second frame is completed using a conflict-driven procedure. With an influence input measure for transition faults under the launch-on-capture scan testing application scheme, a new dynamic test compaction scheme is proposed. The new test compaction scheme tries to compact as many faults as possible into the current test. Experimental results and comparison with existing approaches demonstrate the efficiency and effectiveness of the proposed method.</description><subject>At-speed testing</subject><subject>Automatic test pattern generation</subject><subject>Avoidance</subject><subject>Circuit faults</subject><subject>Circuits</subject><subject>Compaction</subject><subject>Delays</subject><subject>Dynamic tests</subject><subject>Environmental protection</subject><subject>Estimates</subject><subject>Faults</subject><subject>Frames</subject><subject>launch-on-capture (LOC) delay testing</subject><subject>Logic gates</subject><subject>Pattern generation</subject><subject>test data compression</subject><subject>test response compaction</subject><subject>Vectors</subject><subject>Very large scale integration</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2014</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkLFOwzAURSMEEqXwA7BEYmFJeXZSJx5RREuloA4EGC3HfaapUifYycDf4zYVA178ZJ17n3WC4JbAjBDgj-VH8baaUSDxjNIMSApnwYTM52nE_Tn3M7A4yiiBy-DKuR0ASRIOk0Dn7b6Tqg9LdH24RINW9nVrws-634bShCujmwGNQj91Qx--onSDxVC3NizkYNQ2Wpsol11_eC2tNK4-Fizk0Iy1tfm6Di60bBzenO5p8L54LvOXqFgvV_lTEamYZ320mTOlKUkY57LSVUKSTEOcocqgSoEhU5XiKWTIUx_YQFppJIlHKsppuoF4GjyMvZ1tvwe_W-xrp7BppMF2cIIwCsC9MeLR-3_orh2s8b8TXhzjlJIs8RQdKWVb5yxq0dl6L-2PICAO6sVRvTioFyf1PnQ3hmpE_Aswdtwc_wKB-3-K</recordid><startdate>20140901</startdate><enddate>20140901</enddate><creator>Xiang, Dong</creator><creator>Sui, Wenjie</creator><creator>Yin, Boxue</creator><creator>Cheng, Kwang-Ting</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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A new measure is proposed to estimate the influence inputs, which is the subset of inputs to be specified, needed for detecting transition faults. The value requirements at the pseudoprimary inputs (PPIs) of the second frame of the automatic test pattern generation circuit model are partitioned into separate subsets. The sequential backtracing scheme backtraces the value requirements on the PPIs of the second frame subset-by-subset. Justification of the necessary value requirements at the PPIs in the second frame is completed using a conflict-driven procedure. With an influence input measure for transition faults under the launch-on-capture scan testing application scheme, a new dynamic test compaction scheme is proposed. The new test compaction scheme tries to compact as many faults as possible into the current test. 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| identifier | ISSN: 1063-8210 |
| ispartof | IEEE transactions on very large scale integration (VLSI) systems, 2014-09, Vol.22 (9), p.1968-1979 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | At-speed testing Automatic test pattern generation Avoidance Circuit faults Circuits Compaction Delays Dynamic tests Environmental protection Estimates Faults Frames launch-on-capture (LOC) delay testing Logic gates Pattern generation test data compression test response compaction Vectors Very large scale integration |
| title | Compact Test Generation With an Influence Input Measure for Launch-On-Capture Transition Fault Testing |
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