Efficient Memory Repair Using Cache-Based Redundancy
In modern processes, conventional defect density and variability related yield losses are a major concern for the aggressive memory designs in integrated circuits. Synergistic action for memory repair at the circuit and architectural level is essential to maintain the yields and profitability of pas...
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Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2012-12, Vol.20 (12), p.2278-2288 |
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