A Fault-Tolerant Three-Phase Adjustable Speed Drive Topology With Active Common-Mode Voltage Suppression
A fault-tolerant adjustable speed drive (ASD) topology is introduced in this paper. A conventional ASD topology is modified to address: 1) drive vulnerability to semiconductor device faults; 2) input voltage sags; 3) motor vulnerability to effects of long leads; and 4) minimization of common-mode (C...
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Veröffentlicht in: | IEEE transactions on power electronics 2015-05, Vol.30 (5), p.2828-2839 |
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description | A fault-tolerant adjustable speed drive (ASD) topology is introduced in this paper. A conventional ASD topology is modified to address: 1) drive vulnerability to semiconductor device faults; 2) input voltage sags; 3) motor vulnerability to effects of long leads; and 4) minimization of common-mode (CM) voltage applied to the motor terminals. These objectives are attained by inclusion of an auxiliary IGBT inverter leg, three auxiliary diodes, and isolation-reconfiguration circuit. The design and operation of the proposed topology modifications are described for different modes: 1) fault mode, 2) active CM suppression mode, and 3) auxiliary sag compensation (ASC) mode. In case of fault and sag, the isolation and hardware reconfiguration are performed in a controlled manner using triacs/antiparallel thyristors. In normal operation, the auxiliary leg is controlled to actively suppress CM voltage. For inverter IGBT failures (short circuit and open circuit), the auxiliary leg is used as a redundant leg. During voltage sags, the auxiliary leg, along with auxiliary diodes, is operated as a boost converter. A current-shaping control strategy is proposed for the ASC mode. A detailed analysis of CM performance of the proposed topology is provided, and a new figure of merit, CM distortion ratio (CMDR), is introduced to compare the attenuation of CM voltage with that of a conventional ASD topology. The output filter design procedure is outlined. A design example is presented for an 80 kW ASD system, and simulation results validate the proposed auxiliary leg based fault-tolerant scheme. Experimental results from a scaled prototype rated at 1 hp are discussed in this paper. |
doi_str_mv | 10.1109/TPEL.2014.2361905 |
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A conventional ASD topology is modified to address: 1) drive vulnerability to semiconductor device faults; 2) input voltage sags; 3) motor vulnerability to effects of long leads; and 4) minimization of common-mode (CM) voltage applied to the motor terminals. These objectives are attained by inclusion of an auxiliary IGBT inverter leg, three auxiliary diodes, and isolation-reconfiguration circuit. The design and operation of the proposed topology modifications are described for different modes: 1) fault mode, 2) active CM suppression mode, and 3) auxiliary sag compensation (ASC) mode. In case of fault and sag, the isolation and hardware reconfiguration are performed in a controlled manner using triacs/antiparallel thyristors. In normal operation, the auxiliary leg is controlled to actively suppress CM voltage. For inverter IGBT failures (short circuit and open circuit), the auxiliary leg is used as a redundant leg. During voltage sags, the auxiliary leg, along with auxiliary diodes, is operated as a boost converter. A current-shaping control strategy is proposed for the ASC mode. A detailed analysis of CM performance of the proposed topology is provided, and a new figure of merit, CM distortion ratio (CMDR), is introduced to compare the attenuation of CM voltage with that of a conventional ASD topology. The output filter design procedure is outlined. A design example is presented for an 80 kW ASD system, and simulation results validate the proposed auxiliary leg based fault-tolerant scheme. Experimental results from a scaled prototype rated at 1 hp are discussed in this paper.</description><identifier>ISSN: 0885-8993</identifier><identifier>EISSN: 1941-0107</identifier><identifier>DOI: 10.1109/TPEL.2014.2361905</identifier><identifier>CODEN: ITPEE8</identifier><language>eng</language><publisher>IEEE</publisher><subject>Adjustable ; adjustable speed drive ; Circuit faults ; common mode distortion ratio ; common mode suppression ; Design engineering ; Electric potential ; Fault tolerance ; fault tolerant ; Fault tolerant systems ; Faults ; Inverters ; Topology ; Variable speed drives ; Voltage ; Voltage fluctuations ; voltage sag compensation</subject><ispartof>IEEE transactions on power electronics, 2015-05, Vol.30 (5), p.2828-2839</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c298t-f550dad4c1e4be81df88497ddd881cf6495f7c500305912e2956773258cdd6ef3</citedby><cites>FETCH-LOGICAL-c298t-f550dad4c1e4be81df88497ddd881cf6495f7c500305912e2956773258cdd6ef3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6922554$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6922554$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Garg, Pawan</creatorcontrib><creatorcontrib>Essakiappan, Somasundaram</creatorcontrib><creatorcontrib>Krishnamoorthy, Harish S.</creatorcontrib><creatorcontrib>Enjeti, Prasad N.</creatorcontrib><title>A Fault-Tolerant Three-Phase Adjustable Speed Drive Topology With Active Common-Mode Voltage Suppression</title><title>IEEE transactions on power electronics</title><addtitle>TPEL</addtitle><description>A fault-tolerant adjustable speed drive (ASD) topology is introduced in this paper. A conventional ASD topology is modified to address: 1) drive vulnerability to semiconductor device faults; 2) input voltage sags; 3) motor vulnerability to effects of long leads; and 4) minimization of common-mode (CM) voltage applied to the motor terminals. These objectives are attained by inclusion of an auxiliary IGBT inverter leg, three auxiliary diodes, and isolation-reconfiguration circuit. The design and operation of the proposed topology modifications are described for different modes: 1) fault mode, 2) active CM suppression mode, and 3) auxiliary sag compensation (ASC) mode. In case of fault and sag, the isolation and hardware reconfiguration are performed in a controlled manner using triacs/antiparallel thyristors. In normal operation, the auxiliary leg is controlled to actively suppress CM voltage. For inverter IGBT failures (short circuit and open circuit), the auxiliary leg is used as a redundant leg. During voltage sags, the auxiliary leg, along with auxiliary diodes, is operated as a boost converter. A current-shaping control strategy is proposed for the ASC mode. A detailed analysis of CM performance of the proposed topology is provided, and a new figure of merit, CM distortion ratio (CMDR), is introduced to compare the attenuation of CM voltage with that of a conventional ASD topology. The output filter design procedure is outlined. A design example is presented for an 80 kW ASD system, and simulation results validate the proposed auxiliary leg based fault-tolerant scheme. Experimental results from a scaled prototype rated at 1 hp are discussed in this paper.</description><subject>Adjustable</subject><subject>adjustable speed drive</subject><subject>Circuit faults</subject><subject>common mode distortion ratio</subject><subject>common mode suppression</subject><subject>Design engineering</subject><subject>Electric potential</subject><subject>Fault tolerance</subject><subject>fault tolerant</subject><subject>Fault tolerant systems</subject><subject>Faults</subject><subject>Inverters</subject><subject>Topology</subject><subject>Variable speed drives</subject><subject>Voltage</subject><subject>Voltage fluctuations</subject><subject>voltage sag compensation</subject><issn>0885-8993</issn><issn>1941-0107</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kMFPgzAUhxujiXP6BxgvPXph9gGF9kjmpiYzLhH1SDr6GCxAsQWT_fdCZjy95OX7foePkFtgCwAmH9LtarPwGYQLP4hAMn5GZiBD8Biw-JzMmBDcE1IGl-TKuQMbSc5gRsqErtVQ915qarSq7WlaWkRvWyqHNNGHwfVqVyN97xA1fbTVD9LUdKY2-yP9qvqSJnk_PZemaUzrvRqN9NPUvdqP0tB1Fp2rTHtNLgpVO7z5u3PysV6ly2dv8_b0skw2Xu5L0XsF50wrHeaA4Q4F6EKIUMZaayEgL6JQ8iLOOWMB4xJ89CWP4jjwuci1jrAI5uT-tNtZ8z2g67OmcjnWtWrRDC6DiEMguQjCEYUTmlvjnMUi62zVKHvMgGVT1Wyqmk1Vs7-qo3N3cipE_Ocj6fuch8Ev-QBzrQ</recordid><startdate>201505</startdate><enddate>201505</enddate><creator>Garg, Pawan</creator><creator>Essakiappan, Somasundaram</creator><creator>Krishnamoorthy, Harish S.</creator><creator>Enjeti, Prasad N.</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7TB</scope><scope>8FD</scope><scope>F28</scope><scope>FR3</scope><scope>KR7</scope><scope>L7M</scope></search><sort><creationdate>201505</creationdate><title>A Fault-Tolerant Three-Phase Adjustable Speed Drive Topology With Active Common-Mode Voltage Suppression</title><author>Garg, Pawan ; Essakiappan, Somasundaram ; Krishnamoorthy, Harish S. ; Enjeti, Prasad N.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c298t-f550dad4c1e4be81df88497ddd881cf6495f7c500305912e2956773258cdd6ef3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Adjustable</topic><topic>adjustable speed drive</topic><topic>Circuit faults</topic><topic>common mode distortion ratio</topic><topic>common mode suppression</topic><topic>Design engineering</topic><topic>Electric potential</topic><topic>Fault tolerance</topic><topic>fault tolerant</topic><topic>Fault tolerant systems</topic><topic>Faults</topic><topic>Inverters</topic><topic>Topology</topic><topic>Variable speed drives</topic><topic>Voltage</topic><topic>Voltage fluctuations</topic><topic>voltage sag compensation</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Garg, Pawan</creatorcontrib><creatorcontrib>Essakiappan, Somasundaram</creatorcontrib><creatorcontrib>Krishnamoorthy, Harish S.</creatorcontrib><creatorcontrib>Enjeti, Prasad N.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Technology Research Database</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><collection>Civil Engineering Abstracts</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on power electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Garg, Pawan</au><au>Essakiappan, Somasundaram</au><au>Krishnamoorthy, Harish S.</au><au>Enjeti, Prasad N.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Fault-Tolerant Three-Phase Adjustable Speed Drive Topology With Active Common-Mode Voltage Suppression</atitle><jtitle>IEEE transactions on power electronics</jtitle><stitle>TPEL</stitle><date>2015-05</date><risdate>2015</risdate><volume>30</volume><issue>5</issue><spage>2828</spage><epage>2839</epage><pages>2828-2839</pages><issn>0885-8993</issn><eissn>1941-0107</eissn><coden>ITPEE8</coden><abstract>A fault-tolerant adjustable speed drive (ASD) topology is introduced in this paper. A conventional ASD topology is modified to address: 1) drive vulnerability to semiconductor device faults; 2) input voltage sags; 3) motor vulnerability to effects of long leads; and 4) minimization of common-mode (CM) voltage applied to the motor terminals. These objectives are attained by inclusion of an auxiliary IGBT inverter leg, three auxiliary diodes, and isolation-reconfiguration circuit. The design and operation of the proposed topology modifications are described for different modes: 1) fault mode, 2) active CM suppression mode, and 3) auxiliary sag compensation (ASC) mode. In case of fault and sag, the isolation and hardware reconfiguration are performed in a controlled manner using triacs/antiparallel thyristors. In normal operation, the auxiliary leg is controlled to actively suppress CM voltage. For inverter IGBT failures (short circuit and open circuit), the auxiliary leg is used as a redundant leg. During voltage sags, the auxiliary leg, along with auxiliary diodes, is operated as a boost converter. A current-shaping control strategy is proposed for the ASC mode. A detailed analysis of CM performance of the proposed topology is provided, and a new figure of merit, CM distortion ratio (CMDR), is introduced to compare the attenuation of CM voltage with that of a conventional ASD topology. The output filter design procedure is outlined. A design example is presented for an 80 kW ASD system, and simulation results validate the proposed auxiliary leg based fault-tolerant scheme. Experimental results from a scaled prototype rated at 1 hp are discussed in this paper.</abstract><pub>IEEE</pub><doi>10.1109/TPEL.2014.2361905</doi><tpages>12</tpages></addata></record> |
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subjects | Adjustable adjustable speed drive Circuit faults common mode distortion ratio common mode suppression Design engineering Electric potential Fault tolerance fault tolerant Fault tolerant systems Faults Inverters Topology Variable speed drives Voltage Voltage fluctuations voltage sag compensation |
title | A Fault-Tolerant Three-Phase Adjustable Speed Drive Topology With Active Common-Mode Voltage Suppression |
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