Problems of Startup and Phase Jumps in PLL Systems
An adaptive phase-locked loop (PLL) structure is proposed which offers fast and smooth tracking of phase-angle jumps. Correlatively, it offers soft startup stage and avoids undesired frequency swings caused by phase jumps. The adaptive mechanism adjusts the gain of frequency estimation loop in order...
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| Veröffentlicht in: | IEEE transactions on power electronics 2012-04, Vol.27 (4), p.1830-1838 |
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| container_title | IEEE transactions on power electronics |
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| creator | Ghartemani, M. K. Khajehoddin, S. A. Jain, P. K. Bakhshai, A. |
| description | An adaptive phase-locked loop (PLL) structure is proposed which offers fast and smooth tracking of phase-angle jumps. Correlatively, it offers soft startup stage and avoids undesired frequency swings caused by phase jumps. The adaptive mechanism adjusts the gain of frequency estimation loop in order to mitigate large transients of frequency during sudden phase angle variations. This reduces the coupling of phase and frequency variables and allows tremendously faster and smoother estimation of both variables. The proposed adaptive mechanism can be applied to different PLL and adaptive notch-filter systems three of which including the enhanced PLL (EPLL), the synchronous reference frame PLL (SRF-PLL), and the second order generalized integrator frequency-locked loop (SOGI-FLL) are studied in this paper. |
| doi_str_mv | 10.1109/TPEL.2011.2169089 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TPEL_2011_2169089</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6025304</ieee_id><sourcerecordid>2602836791</sourcerecordid><originalsourceid>FETCH-LOGICAL-c322t-e99b74fea9b0ea6badc9f12069619d4a21f3f60cb91d63fab66fd5ea1241d09b3</originalsourceid><addsrcrecordid>eNo9kE1Lw0AURQdRsFZ_gLgZBJep702SSd5SSusHAQOt62GSzGBKm8SZZNF_b0JLV29xz70PDmOPCAtEoNdtvsoWAhAXAiVBSldshhRhAAjJNZtBmsZBShTesjvvdwAYxYAzJnLXFntz8Ly1fNNr1w8d103F81_tDf8aDp3ndcPzLOObo-9H8p7dWL335uF85-xnvdouP4Ls-_1z-ZYFZShEHxiiIoms0VSA0bLQVUkWBUiSSFWkBdrQSigLwkqGVhdS2io2GkWEFVARztnzabdz7d9gfK927eCa8aUiISPAVKYjhCeodK33zljVufqg3VEhqMmMmsyoyYw6mxk7L-dh7Uu9t043Ze0vRREnAhOcuKcTVxtjLrEEEYcQhf9fBWrV</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>926401868</pqid></control><display><type>article</type><title>Problems of Startup and Phase Jumps in PLL Systems</title><source>IEEE Electronic Library (IEL)</source><creator>Ghartemani, M. K. ; Khajehoddin, S. A. ; Jain, P. K. ; Bakhshai, A.</creator><creatorcontrib>Ghartemani, M. K. ; Khajehoddin, S. A. ; Jain, P. K. ; Bakhshai, A.</creatorcontrib><description>An adaptive phase-locked loop (PLL) structure is proposed which offers fast and smooth tracking of phase-angle jumps. Correlatively, it offers soft startup stage and avoids undesired frequency swings caused by phase jumps. The adaptive mechanism adjusts the gain of frequency estimation loop in order to mitigate large transients of frequency during sudden phase angle variations. This reduces the coupling of phase and frequency variables and allows tremendously faster and smoother estimation of both variables. The proposed adaptive mechanism can be applied to different PLL and adaptive notch-filter systems three of which including the enhanced PLL (EPLL), the synchronous reference frame PLL (SRF-PLL), and the second order generalized integrator frequency-locked loop (SOGI-FLL) are studied in this paper.</description><identifier>ISSN: 0885-8993</identifier><identifier>EISSN: 1941-0107</identifier><identifier>DOI: 10.1109/TPEL.2011.2169089</identifier><identifier>CODEN: ITPEE8</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Adaptive systems ; Applied sciences ; Capacitors. Resistors. Filters ; Circuit properties ; Circuits of signal characteristics conditioning (including delay circuits) ; Correlation analysis ; Couplings ; Electric, optical and optoelectronic circuits ; Electrical engineering. Electrical power engineering ; Electrical power engineering ; Electronic circuits ; Electronics ; EPLL ; Estimating techniques ; Exact sciences and technology ; Frequencies ; Frequency estimation ; Frequency filters ; Operation. Load control. Reliability ; phase estimation ; phase jumps ; Phase locked loops ; phase-locked loop ; PLL startup ; PLL transient response ; Power networks and lines ; SOGI-FLL ; SRF-PLL ; Synchronization ; Transient analysis ; Various equipment and components</subject><ispartof>IEEE transactions on power electronics, 2012-04, Vol.27 (4), p.1830-1838</ispartof><rights>2015 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Apr 2012</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c322t-e99b74fea9b0ea6badc9f12069619d4a21f3f60cb91d63fab66fd5ea1241d09b3</citedby><cites>FETCH-LOGICAL-c322t-e99b74fea9b0ea6badc9f12069619d4a21f3f60cb91d63fab66fd5ea1241d09b3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6025304$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6025304$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=25721719$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Ghartemani, M. K.</creatorcontrib><creatorcontrib>Khajehoddin, S. A.</creatorcontrib><creatorcontrib>Jain, P. K.</creatorcontrib><creatorcontrib>Bakhshai, A.</creatorcontrib><title>Problems of Startup and Phase Jumps in PLL Systems</title><title>IEEE transactions on power electronics</title><addtitle>TPEL</addtitle><description>An adaptive phase-locked loop (PLL) structure is proposed which offers fast and smooth tracking of phase-angle jumps. Correlatively, it offers soft startup stage and avoids undesired frequency swings caused by phase jumps. The adaptive mechanism adjusts the gain of frequency estimation loop in order to mitigate large transients of frequency during sudden phase angle variations. This reduces the coupling of phase and frequency variables and allows tremendously faster and smoother estimation of both variables. The proposed adaptive mechanism can be applied to different PLL and adaptive notch-filter systems three of which including the enhanced PLL (EPLL), the synchronous reference frame PLL (SRF-PLL), and the second order generalized integrator frequency-locked loop (SOGI-FLL) are studied in this paper.</description><subject>Adaptive systems</subject><subject>Applied sciences</subject><subject>Capacitors. Resistors. Filters</subject><subject>Circuit properties</subject><subject>Circuits of signal characteristics conditioning (including delay circuits)</subject><subject>Correlation analysis</subject><subject>Couplings</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electrical engineering. Electrical power engineering</subject><subject>Electrical power engineering</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>EPLL</subject><subject>Estimating techniques</subject><subject>Exact sciences and technology</subject><subject>Frequencies</subject><subject>Frequency estimation</subject><subject>Frequency filters</subject><subject>Operation. Load control. Reliability</subject><subject>phase estimation</subject><subject>phase jumps</subject><subject>Phase locked loops</subject><subject>phase-locked loop</subject><subject>PLL startup</subject><subject>PLL transient response</subject><subject>Power networks and lines</subject><subject>SOGI-FLL</subject><subject>SRF-PLL</subject><subject>Synchronization</subject><subject>Transient analysis</subject><subject>Various equipment and components</subject><issn>0885-8993</issn><issn>1941-0107</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1Lw0AURQdRsFZ_gLgZBJep702SSd5SSusHAQOt62GSzGBKm8SZZNF_b0JLV29xz70PDmOPCAtEoNdtvsoWAhAXAiVBSldshhRhAAjJNZtBmsZBShTesjvvdwAYxYAzJnLXFntz8Ly1fNNr1w8d103F81_tDf8aDp3ndcPzLOObo-9H8p7dWL335uF85-xnvdouP4Ls-_1z-ZYFZShEHxiiIoms0VSA0bLQVUkWBUiSSFWkBdrQSigLwkqGVhdS2io2GkWEFVARztnzabdz7d9gfK927eCa8aUiISPAVKYjhCeodK33zljVufqg3VEhqMmMmsyoyYw6mxk7L-dh7Uu9t043Ze0vRREnAhOcuKcTVxtjLrEEEYcQhf9fBWrV</recordid><startdate>20120401</startdate><enddate>20120401</enddate><creator>Ghartemani, M. K.</creator><creator>Khajehoddin, S. A.</creator><creator>Jain, P. K.</creator><creator>Bakhshai, A.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7TB</scope><scope>8FD</scope><scope>FR3</scope><scope>JQ2</scope><scope>KR7</scope><scope>L7M</scope></search><sort><creationdate>20120401</creationdate><title>Problems of Startup and Phase Jumps in PLL Systems</title><author>Ghartemani, M. K. ; Khajehoddin, S. A. ; Jain, P. K. ; Bakhshai, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c322t-e99b74fea9b0ea6badc9f12069619d4a21f3f60cb91d63fab66fd5ea1241d09b3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Adaptive systems</topic><topic>Applied sciences</topic><topic>Capacitors. Resistors. Filters</topic><topic>Circuit properties</topic><topic>Circuits of signal characteristics conditioning (including delay circuits)</topic><topic>Correlation analysis</topic><topic>Couplings</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electrical engineering. Electrical power engineering</topic><topic>Electrical power engineering</topic><topic>Electronic circuits</topic><topic>Electronics</topic><topic>EPLL</topic><topic>Estimating techniques</topic><topic>Exact sciences and technology</topic><topic>Frequencies</topic><topic>Frequency estimation</topic><topic>Frequency filters</topic><topic>Operation. Load control. Reliability</topic><topic>phase estimation</topic><topic>phase jumps</topic><topic>Phase locked loops</topic><topic>phase-locked loop</topic><topic>PLL startup</topic><topic>PLL transient response</topic><topic>Power networks and lines</topic><topic>SOGI-FLL</topic><topic>SRF-PLL</topic><topic>Synchronization</topic><topic>Transient analysis</topic><topic>Various equipment and components</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Ghartemani, M. K.</creatorcontrib><creatorcontrib>Khajehoddin, S. A.</creatorcontrib><creatorcontrib>Jain, P. K.</creatorcontrib><creatorcontrib>Bakhshai, A.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Civil Engineering Abstracts</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on power electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ghartemani, M. K.</au><au>Khajehoddin, S. A.</au><au>Jain, P. K.</au><au>Bakhshai, A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Problems of Startup and Phase Jumps in PLL Systems</atitle><jtitle>IEEE transactions on power electronics</jtitle><stitle>TPEL</stitle><date>2012-04-01</date><risdate>2012</risdate><volume>27</volume><issue>4</issue><spage>1830</spage><epage>1838</epage><pages>1830-1838</pages><issn>0885-8993</issn><eissn>1941-0107</eissn><coden>ITPEE8</coden><abstract>An adaptive phase-locked loop (PLL) structure is proposed which offers fast and smooth tracking of phase-angle jumps. Correlatively, it offers soft startup stage and avoids undesired frequency swings caused by phase jumps. The adaptive mechanism adjusts the gain of frequency estimation loop in order to mitigate large transients of frequency during sudden phase angle variations. This reduces the coupling of phase and frequency variables and allows tremendously faster and smoother estimation of both variables. The proposed adaptive mechanism can be applied to different PLL and adaptive notch-filter systems three of which including the enhanced PLL (EPLL), the synchronous reference frame PLL (SRF-PLL), and the second order generalized integrator frequency-locked loop (SOGI-FLL) are studied in this paper.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TPEL.2011.2169089</doi><tpages>9</tpages></addata></record> |
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| source | IEEE Electronic Library (IEL) |
| subjects | Adaptive systems Applied sciences Capacitors. Resistors. Filters Circuit properties Circuits of signal characteristics conditioning (including delay circuits) Correlation analysis Couplings Electric, optical and optoelectronic circuits Electrical engineering. Electrical power engineering Electrical power engineering Electronic circuits Electronics EPLL Estimating techniques Exact sciences and technology Frequencies Frequency estimation Frequency filters Operation. Load control. Reliability phase estimation phase jumps Phase locked loops phase-locked loop PLL startup PLL transient response Power networks and lines SOGI-FLL SRF-PLL Synchronization Transient analysis Various equipment and components |
| title | Problems of Startup and Phase Jumps in PLL Systems |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-29T13%3A43%3A04IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Problems%20of%20Startup%20and%20Phase%20Jumps%20in%20PLL%20Systems&rft.jtitle=IEEE%20transactions%20on%20power%20electronics&rft.au=Ghartemani,%20M.%20K.&rft.date=2012-04-01&rft.volume=27&rft.issue=4&rft.spage=1830&rft.epage=1838&rft.pages=1830-1838&rft.issn=0885-8993&rft.eissn=1941-0107&rft.coden=ITPEE8&rft_id=info:doi/10.1109/TPEL.2011.2169089&rft_dat=%3Cproquest_RIE%3E2602836791%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=926401868&rft_id=info:pmid/&rft_ieee_id=6025304&rfr_iscdi=true |