Lockstep Dual-Core ARM A9: Implementation and Resilience Analysis Under Heavy Ion-Induced Soft Errors
This paper presents a dual-core lockstep (DCLS) implementation to protect hard-core processors against radiation-induced soft errors. The proposed DCLS is applied to an Advanced RISC Machine Cortex-A9 embedded processor. Different software optimizations were evaluated to assess their impact on perfo...
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Veröffentlicht in: | IEEE transactions on nuclear science 2018-08, Vol.65 (8), p.1783-1790 |
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Sprache: | eng |
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