A 65 nm Temporally Hardened Flip-Flop Circuit

A guard-gate based flip-flop circuit temporally hardened against single-event effects is presented in this paper. Compared to several existed techniques, the organization of components inside the proposed design allows the improved performance- only one \tau (the maximum width of a single-event tran...

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Veröffentlicht in:	IEEE transactions on nuclear science 2016-12, Vol.63 (6), p.2934-2940
Hauptverfasser:	Li, Y.-Q, Wang, H.-B, Rui Liu, Li Chen, Nofal, Issam, Chen, Q.-Y, He, A.-L, Gang Guo, Baeg, Sang H., Shi-Jie Wen, Wong, Richard, Qiong Wu, Mo Chen
Format:	Artikel
Sprache:	eng
Schlagworte:	Alpha rays Circuit faults Circuits Design Flip-flop Flip-flops Latches Radiation hardening (electronics) SET SEU Single Event Effects Single event upsets Soft errors temporal hardening Transient analysis α Radiation
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