Radiation-Tolerant Code-Density Calibration of Nyquist-Rate Analog-to-Digital Converters
A radiation-tolerant analog-to-digital converter (ADC) calibration algorithm based on measuring and correcting the code-density histogram of the converter under calibration is presented. The algorithm constructs a histogram of the ADC response to a linear ramp and stores the calculated correction co...
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Veröffentlicht in: | IEEE transactions on nuclear science 2013-04, Vol.60 (2), p.1303-1310 |
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creator | Grace, C. R. Denes, P. Gnani, D. von der Lippe, H. Walder, J. |
description | A radiation-tolerant analog-to-digital converter (ADC) calibration algorithm based on measuring and correcting the code-density histogram of the converter under calibration is presented. The algorithm constructs a histogram of the ADC response to a linear ramp and stores the calculated correction coefficients in a lookup table. The algorithm uses techniques to increase tolerance to soft errors both during convergence and during normal operation. By leveraging circuit density improvements in deep submicron CMOS technology, the algorithm is able to provide substantive improvements to ADC static linearity performance at low silicon cost. The algorithm is applied to an 80-MS/s, 10-bit prototype Pipelined ADC implemented in 65-nm CMOS technology. The ADC is implemented with two additional stages to provide calibration data. The calibration algorithm improves measured integral nonlinearity from -4.11/1.32 least significant bits (LSB) to -0.29/0.30 LSB at a 10-bit level. |
doi_str_mv | 10.1109/TNS.2013.2251903 |
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The ADC is implemented with two additional stages to provide calibration data. The calibration algorithm improves measured integral nonlinearity from -4.11/1.32 least significant bits (LSB) to -0.29/0.30 LSB at a 10-bit level.</description><identifier>ISSN: 0018-9499</identifier><identifier>EISSN: 1558-1578</identifier><identifier>DOI: 10.1109/TNS.2013.2251903</identifier><identifier>CODEN: IETNAE</identifier><language>eng</language><publisher>IEEE</publisher><subject>analog integrated circuits ; Analog-digital conversion ; Application specific integrated circuits ; Calibration ; CMOS integrated circuits ; Convergence ; Histograms ; Least squares approximations ; Linearity ; Table lookup</subject><ispartof>IEEE transactions on nuclear science, 2013-04, Vol.60 (2), p.1303-1310</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c216t-3ad0e6331b070b9e475d001f83762749d69447ee23fa625bc5dfd0c2325b47863</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6496295$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,778,782,794,27907,27908,54741</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6496295$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Grace, C. R.</creatorcontrib><creatorcontrib>Denes, P.</creatorcontrib><creatorcontrib>Gnani, D.</creatorcontrib><creatorcontrib>von der Lippe, H.</creatorcontrib><creatorcontrib>Walder, J.</creatorcontrib><title>Radiation-Tolerant Code-Density Calibration of Nyquist-Rate Analog-to-Digital Converters</title><title>IEEE transactions on nuclear science</title><addtitle>TNS</addtitle><description>A radiation-tolerant analog-to-digital converter (ADC) calibration algorithm based on measuring and correcting the code-density histogram of the converter under calibration is presented. The algorithm constructs a histogram of the ADC response to a linear ramp and stores the calculated correction coefficients in a lookup table. The algorithm uses techniques to increase tolerance to soft errors both during convergence and during normal operation. By leveraging circuit density improvements in deep submicron CMOS technology, the algorithm is able to provide substantive improvements to ADC static linearity performance at low silicon cost. The algorithm is applied to an 80-MS/s, 10-bit prototype Pipelined ADC implemented in 65-nm CMOS technology. The ADC is implemented with two additional stages to provide calibration data. The calibration algorithm improves measured integral nonlinearity from -4.11/1.32 least significant bits (LSB) to -0.29/0.30 LSB at a 10-bit level.</description><subject>analog integrated circuits</subject><subject>Analog-digital conversion</subject><subject>Application specific integrated circuits</subject><subject>Calibration</subject><subject>CMOS integrated circuits</subject><subject>Convergence</subject><subject>Histograms</subject><subject>Least squares approximations</subject><subject>Linearity</subject><subject>Table lookup</subject><issn>0018-9499</issn><issn>1558-1578</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1LAzEQhoMoWKt3wcv-gdR8Z3MsW7-gVKgVvC3ZzWyJrBtNotB_79YWT_MOvM8wPAhdUzKjlJjbzeplxgjlM8YkNYSfoAmVssRU6vIUTQihJTbCmHN0kdL7uApJ5AS9ra3zNvsw4E3oIdohF1VwgBcwJJ93RWV738S_RhG6YrX7-vYp47XNUMwH24ctzgEv_NZn24_o8AMxQ0yX6KyzfYKr45yi1_u7TfWIl88PT9V8iVtGVcbcOgKKc9oQTRoDQks3PteVXCumhXHKCKEBGO-sYrJppescaRkfs9Cl4lNEDnfbGFKK0NWf0X_YuKspqfdm6tFMvTdTH82MyM0B8QDwX1fCKGYk_wWRx19s</recordid><startdate>20130401</startdate><enddate>20130401</enddate><creator>Grace, C. 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R.</creatorcontrib><creatorcontrib>Denes, P.</creatorcontrib><creatorcontrib>Gnani, D.</creatorcontrib><creatorcontrib>von der Lippe, H.</creatorcontrib><creatorcontrib>Walder, J.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE transactions on nuclear science</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Grace, C. R.</au><au>Denes, P.</au><au>Gnani, D.</au><au>von der Lippe, H.</au><au>Walder, J.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Radiation-Tolerant Code-Density Calibration of Nyquist-Rate Analog-to-Digital Converters</atitle><jtitle>IEEE transactions on nuclear science</jtitle><stitle>TNS</stitle><date>2013-04-01</date><risdate>2013</risdate><volume>60</volume><issue>2</issue><spage>1303</spage><epage>1310</epage><pages>1303-1310</pages><issn>0018-9499</issn><eissn>1558-1578</eissn><coden>IETNAE</coden><abstract>A radiation-tolerant analog-to-digital converter (ADC) calibration algorithm based on measuring and correcting the code-density histogram of the converter under calibration is presented. The algorithm constructs a histogram of the ADC response to a linear ramp and stores the calculated correction coefficients in a lookup table. The algorithm uses techniques to increase tolerance to soft errors both during convergence and during normal operation. By leveraging circuit density improvements in deep submicron CMOS technology, the algorithm is able to provide substantive improvements to ADC static linearity performance at low silicon cost. The algorithm is applied to an 80-MS/s, 10-bit prototype Pipelined ADC implemented in 65-nm CMOS technology. The ADC is implemented with two additional stages to provide calibration data. The calibration algorithm improves measured integral nonlinearity from -4.11/1.32 least significant bits (LSB) to -0.29/0.30 LSB at a 10-bit level.</abstract><pub>IEEE</pub><doi>10.1109/TNS.2013.2251903</doi><tpages>8</tpages></addata></record> |
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subjects | analog integrated circuits Analog-digital conversion Application specific integrated circuits Calibration CMOS integrated circuits Convergence Histograms Least squares approximations Linearity Table lookup |
title | Radiation-Tolerant Code-Density Calibration of Nyquist-Rate Analog-to-Digital Converters |
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