Laser-Induced Latchup Screening and Mitigation in CMOS Devices

The application of the pulsed laser approach for identifying latch-up sensitive regions in CMOS circuitry is described. The utility of this approach for preliminary latchup screening of both COTS and space-qualified parts for applications in radiation environments is described. An application of har...

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Veröffentlicht in:	IEEE transactions on nuclear science 2006-08, Vol.53 (4), p.1819-1824
Hauptverfasser:	McMorrow, D., Buchner, S., Baze, M., Bartholet, B., Katz, R., O'Bryan, M., Poivey, C., LaBel, K.A., Ladbury, R., Maher, M., Sexton, F.W.
Format:	Artikel
Sprache:	eng
Schlagworte:	CMOS Devices Electric circuits Hardening Integrated circuit interconnections Laboratories laser Laser theory Latch-up latchup micro-latchup NASA Optical pulses picosecond Pulse circuits Pulsed laser deposition Pulsed lasers Radiation hardening Screening single-event effects single-event latchup (SEL) Space technology Switches Utilities
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