Information Density in Multi-Layer Resistive Memories
Resistive memories store information in a crossbar arrangement of two-terminal devices that can be programmed to patterns of high or low resistance. While extremely compact, this technology suffers from the "sneak-path" problem: certain information patterns cannot be recovered, as multiple...
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| Veröffentlicht in: | IEEE transactions on information theory 2021-03, Vol.67 (3), p.1446-1460 |
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| container_title | IEEE transactions on information theory |
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| creator | Rumsey, Susanna E. Draper, Stark C. Kschischang, Frank R. |
| description | Resistive memories store information in a crossbar arrangement of two-terminal devices that can be programmed to patterns of high or low resistance. While extremely compact, this technology suffers from the "sneak-path" problem: certain information patterns cannot be recovered, as multiple low resistances in parallel make a high resistance indistinguishable from a low resistance. In this paper, a multi-layer device is considered, and the number of bits it can store is derived exactly and asymptotic bounds are developed. The information density of a series of isolated arrays with extreme aspect ratios is derived in the single- and multi-layer cases with and without peripheral selection circuitry. This density is shown to be non-zero in the limit, unlike that of the arrays with moderate aspect ratios previously considered. A simple encoding scheme that achieves capacity asymptotically is presented. |
| doi_str_mv | 10.1109/TIT.2020.3040255 |
| format | Article |
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While extremely compact, this technology suffers from the "sneak-path" problem: certain information patterns cannot be recovered, as multiple low resistances in parallel make a high resistance indistinguishable from a low resistance. In this paper, a multi-layer device is considered, and the number of bits it can store is derived exactly and asymptotic bounds are developed. The information density of a series of isolated arrays with extreme aspect ratios is derived in the single- and multi-layer cases with and without peripheral selection circuitry. This density is shown to be non-zero in the limit, unlike that of the arrays with moderate aspect ratios previously considered. A simple encoding scheme that achieves capacity asymptotically is presented.</description><subject>Arrays</subject><subject>Aspect ratio</subject><subject>Asymptotic properties</subject><subject>Circuits</subject><subject>combinatorial mathematics</subject><subject>Computer architecture</subject><subject>Current measurement</subject><subject>Density</subject><subject>Electrical resistance measurement</subject><subject>Encoding</subject><subject>High resistance</subject><subject>information theory</subject><subject>Low resistance</subject><subject>memory architecture</subject><subject>Memristors</subject><subject>Multilayers</subject><subject>Resistance</subject><subject>Wires</subject><issn>0018-9448</issn><issn>1557-9654</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1Lw0AQhhdRMFbvgpeA59SZ_Uh2j1K_CimC1POyTWdhS5vU3VTovzclxdMw8LwzLw9j9whTRDBPy_lyyoHDVIAErtQFy1CpqjClkpcsA0BdGCn1NbtJaTOsUiHPmJq3vos714euzV-oTaE_5qHNF4dtH4raHSnmX5RC6sMv5QvadTFQumVX3m0T3Z3nhH2_vS5nH0X9-T6fPddFww32hYOVQy29N1gSl44j6qZaE19XRIRSr8yq8eiE4ZqXWArUUK69k7Ih4YQWE_Y43t3H7udAqbeb7hDb4aXl0oAGUHCiYKSa2KUUydt9DDsXjxbBnuTYQY49ybFnOUPkYYyEocg_bniph1biD-ZlXxA</recordid><startdate>20210301</startdate><enddate>20210301</enddate><creator>Rumsey, Susanna E.</creator><creator>Draper, Stark C.</creator><creator>Kschischang, Frank R.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Arrays Aspect ratio Asymptotic properties Circuits combinatorial mathematics Computer architecture Current measurement Density Electrical resistance measurement Encoding High resistance information theory Low resistance memory architecture Memristors Multilayers Resistance Wires |
| title | Information Density in Multi-Layer Resistive Memories |
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