On Quadratic Permutation Polynomials, Turbo Codes, and Butterfly Networks
The use of quadratic permutation polynomials as interleavers for turbo codes is justified, among other things, by the fact that the quadratic permutation polynomials provide turbo codes of very good performance and simultaneously they support a specific conflict-free parallel access to extrinsic val...
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Veröffentlicht in: | IEEE transactions on information theory 2017-09, Vol.63 (9), p.5793-5801 |
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description | The use of quadratic permutation polynomials as interleavers for turbo codes is justified, among other things, by the fact that the quadratic permutation polynomials provide turbo codes of very good performance and simultaneously they support a specific conflict-free parallel access to extrinsic values in two different access orders. It is rather easy to write and read in parallel to and from multiple memories by one access order. Nevertheless, turbo decoders have to access the multiple memories at least by two different access orders. Then, parallel writes and reads lead to conflicts in accessing the multiple memories. Having only one conflict-free parallel access method for quadratic permutation polynomials restricts to design efficient flexible (multistandard) decoders for turbo codes at high data rates. We show that quadratic permutation polynomials with butterfly networks as interconnection networks between decoder units and memories support many kinds of flexible and variant conflict-free parallel access methods for turbo codes that are not known today. This result extends possibilities to implement high speed turbo decoders not only by application specific circuits but also by (general purpose) graphics processor units for (multistandard) modems. |
doi_str_mv | 10.1109/TIT.2017.2717579 |
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fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TIT_2017_2717579</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7953669</ieee_id><sourcerecordid>2174326331</sourcerecordid><originalsourceid>FETCH-LOGICAL-c291t-40069ac955d6ff11496417ce70bb869741613b0a29c6f85eaf8b37ae578c793a3</originalsourceid><addsrcrecordid>eNo9kF1LwzAUhoMoOKf3gjcBb-3Mab6aSx1-FIabUK9DmibQuTUzbZH9ezM2vDrnhec9Bx6EboHMAIh6rMpqlhOQs1yC5FKdoQlwLjMlODtHE0KgyBRjxSW66vt1ioxDPkHlssOfo2miGVqLVy5uxyGtocOrsNl3YduaTf-AqzHWAc9D41IwXYOfx2Fw0W_2-MMNvyF-99fowifW3ZzmFH29vlTz92yxfCvnT4vM5gqGjBEilLGK80Z4D8CUYCCtk6SuC6EkAwG0JiZXVviCO-OLmkrjuCysVNTQKbo_3t3F8DO6ftDrMMYuvdQ5SEZzQSkkihwpG0PfR-f1LrZbE_caiD4I00mYPgjTJ2GpcnestM65f1wqToVQ9A-WrGXX</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2174326331</pqid></control><display><type>article</type><title>On Quadratic Permutation Polynomials, Turbo Codes, and Butterfly Networks</title><source>IEEE Electronic Library (IEL)</source><creator>Nieminen, Esko</creator><creatorcontrib>Nieminen, Esko</creatorcontrib><description>The use of quadratic permutation polynomials as interleavers for turbo codes is justified, among other things, by the fact that the quadratic permutation polynomials provide turbo codes of very good performance and simultaneously they support a specific conflict-free parallel access to extrinsic values in two different access orders. It is rather easy to write and read in parallel to and from multiple memories by one access order. Nevertheless, turbo decoders have to access the multiple memories at least by two different access orders. Then, parallel writes and reads lead to conflicts in accessing the multiple memories. Having only one conflict-free parallel access method for quadratic permutation polynomials restricts to design efficient flexible (multistandard) decoders for turbo codes at high data rates. We show that quadratic permutation polynomials with butterfly networks as interconnection networks between decoder units and memories support many kinds of flexible and variant conflict-free parallel access methods for turbo codes that are not known today. This result extends possibilities to implement high speed turbo decoders not only by application specific circuits but also by (general purpose) graphics processor units for (multistandard) modems.</description><identifier>ISSN: 0018-9448</identifier><identifier>EISSN: 1557-9654</identifier><identifier>DOI: 10.1109/TIT.2017.2717579</identifier><identifier>CODEN: IETTAW</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>4G mobile communication ; butterfly network ; Codes ; collision-free ; contention-free ; Decoders ; Decoding ; Graphs ; Indexing ; Interleaver ; Iterative decoding ; Micromechanical devices ; Microprocessors ; Modems ; Multiprocessor interconnection ; multiprocessor interconnection networks ; Networks ; omega network ; parallel access ; parallel architectures ; Permutations ; Polynomials ; shuffle-exchange network ; Turbo codes</subject><ispartof>IEEE transactions on information theory, 2017-09, Vol.63 (9), p.5793-5801</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2017</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-40069ac955d6ff11496417ce70bb869741613b0a29c6f85eaf8b37ae578c793a3</citedby><cites>FETCH-LOGICAL-c291t-40069ac955d6ff11496417ce70bb869741613b0a29c6f85eaf8b37ae578c793a3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7953669$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7953669$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Nieminen, Esko</creatorcontrib><title>On Quadratic Permutation Polynomials, Turbo Codes, and Butterfly Networks</title><title>IEEE transactions on information theory</title><addtitle>TIT</addtitle><description>The use of quadratic permutation polynomials as interleavers for turbo codes is justified, among other things, by the fact that the quadratic permutation polynomials provide turbo codes of very good performance and simultaneously they support a specific conflict-free parallel access to extrinsic values in two different access orders. It is rather easy to write and read in parallel to and from multiple memories by one access order. Nevertheless, turbo decoders have to access the multiple memories at least by two different access orders. Then, parallel writes and reads lead to conflicts in accessing the multiple memories. Having only one conflict-free parallel access method for quadratic permutation polynomials restricts to design efficient flexible (multistandard) decoders for turbo codes at high data rates. We show that quadratic permutation polynomials with butterfly networks as interconnection networks between decoder units and memories support many kinds of flexible and variant conflict-free parallel access methods for turbo codes that are not known today. This result extends possibilities to implement high speed turbo decoders not only by application specific circuits but also by (general purpose) graphics processor units for (multistandard) modems.</description><subject>4G mobile communication</subject><subject>butterfly network</subject><subject>Codes</subject><subject>collision-free</subject><subject>contention-free</subject><subject>Decoders</subject><subject>Decoding</subject><subject>Graphs</subject><subject>Indexing</subject><subject>Interleaver</subject><subject>Iterative decoding</subject><subject>Micromechanical devices</subject><subject>Microprocessors</subject><subject>Modems</subject><subject>Multiprocessor interconnection</subject><subject>multiprocessor interconnection networks</subject><subject>Networks</subject><subject>omega network</subject><subject>parallel access</subject><subject>parallel architectures</subject><subject>Permutations</subject><subject>Polynomials</subject><subject>shuffle-exchange network</subject><subject>Turbo codes</subject><issn>0018-9448</issn><issn>1557-9654</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2017</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kF1LwzAUhoMoOKf3gjcBb-3Mab6aSx1-FIabUK9DmibQuTUzbZH9ezM2vDrnhec9Bx6EboHMAIh6rMpqlhOQs1yC5FKdoQlwLjMlODtHE0KgyBRjxSW66vt1ioxDPkHlssOfo2miGVqLVy5uxyGtocOrsNl3YduaTf-AqzHWAc9D41IwXYOfx2Fw0W_2-MMNvyF-99fowifW3ZzmFH29vlTz92yxfCvnT4vM5gqGjBEilLGK80Z4D8CUYCCtk6SuC6EkAwG0JiZXVviCO-OLmkrjuCysVNTQKbo_3t3F8DO6ftDrMMYuvdQ5SEZzQSkkihwpG0PfR-f1LrZbE_caiD4I00mYPgjTJ2GpcnestM65f1wqToVQ9A-WrGXX</recordid><startdate>20170901</startdate><enddate>20170901</enddate><creator>Nieminen, Esko</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>20170901</creationdate><title>On Quadratic Permutation Polynomials, Turbo Codes, and Butterfly Networks</title><author>Nieminen, Esko</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c291t-40069ac955d6ff11496417ce70bb869741613b0a29c6f85eaf8b37ae578c793a3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2017</creationdate><topic>4G mobile communication</topic><topic>butterfly network</topic><topic>Codes</topic><topic>collision-free</topic><topic>contention-free</topic><topic>Decoders</topic><topic>Decoding</topic><topic>Graphs</topic><topic>Indexing</topic><topic>Interleaver</topic><topic>Iterative decoding</topic><topic>Micromechanical devices</topic><topic>Microprocessors</topic><topic>Modems</topic><topic>Multiprocessor interconnection</topic><topic>multiprocessor interconnection networks</topic><topic>Networks</topic><topic>omega network</topic><topic>parallel access</topic><topic>parallel architectures</topic><topic>Permutations</topic><topic>Polynomials</topic><topic>shuffle-exchange network</topic><topic>Turbo codes</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Nieminen, Esko</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEEE transactions on information theory</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nieminen, Esko</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>On Quadratic Permutation Polynomials, Turbo Codes, and Butterfly Networks</atitle><jtitle>IEEE transactions on information theory</jtitle><stitle>TIT</stitle><date>2017-09-01</date><risdate>2017</risdate><volume>63</volume><issue>9</issue><spage>5793</spage><epage>5801</epage><pages>5793-5801</pages><issn>0018-9448</issn><eissn>1557-9654</eissn><coden>IETTAW</coden><abstract>The use of quadratic permutation polynomials as interleavers for turbo codes is justified, among other things, by the fact that the quadratic permutation polynomials provide turbo codes of very good performance and simultaneously they support a specific conflict-free parallel access to extrinsic values in two different access orders. It is rather easy to write and read in parallel to and from multiple memories by one access order. Nevertheless, turbo decoders have to access the multiple memories at least by two different access orders. Then, parallel writes and reads lead to conflicts in accessing the multiple memories. Having only one conflict-free parallel access method for quadratic permutation polynomials restricts to design efficient flexible (multistandard) decoders for turbo codes at high data rates. We show that quadratic permutation polynomials with butterfly networks as interconnection networks between decoder units and memories support many kinds of flexible and variant conflict-free parallel access methods for turbo codes that are not known today. This result extends possibilities to implement high speed turbo decoders not only by application specific circuits but also by (general purpose) graphics processor units for (multistandard) modems.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TIT.2017.2717579</doi><tpages>9</tpages></addata></record> |
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subjects | 4G mobile communication butterfly network Codes collision-free contention-free Decoders Decoding Graphs Indexing Interleaver Iterative decoding Micromechanical devices Microprocessors Modems Multiprocessor interconnection multiprocessor interconnection networks Networks omega network parallel access parallel architectures Permutations Polynomials shuffle-exchange network Turbo codes |
title | On Quadratic Permutation Polynomials, Turbo Codes, and Butterfly Networks |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T19%3A23%3A22IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=On%20Quadratic%20Permutation%20Polynomials,%20Turbo%20Codes,%20and%20Butterfly%20Networks&rft.jtitle=IEEE%20transactions%20on%20information%20theory&rft.au=Nieminen,%20Esko&rft.date=2017-09-01&rft.volume=63&rft.issue=9&rft.spage=5793&rft.epage=5801&rft.pages=5793-5801&rft.issn=0018-9448&rft.eissn=1557-9654&rft.coden=IETTAW&rft_id=info:doi/10.1109/TIT.2017.2717579&rft_dat=%3Cproquest_RIE%3E2174326331%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2174326331&rft_id=info:pmid/&rft_ieee_id=7953669&rfr_iscdi=true |